| Message ID | 20240730075744.1215856-1-maobibo@loongson.cn (mailing list archive) |
|---|---|
| Headers | show |
| Series | LoongArch: KVM: Add Binary Translation extension support | expand |
Hi, Bibo, I have consulted with Jiaxun offline, and he has tried his best to propose a "scratch vcpu" solution. But unfortunately that solution is too difficult to implement and he has nearly given up. So the solution in this series seems the best one, and I will queue it for loongarch-kvm now. Huacai On Tue, Jul 30, 2024 at 3:57 PM Bibo Mao <maobibo@loongson.cn> wrote: > > Loongson Binary Translation (LBT) is used to accelerate binary > translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM > eflags (eflags) and x87 fpu stack pointer (ftop). > > Like FPU extension, here lately enabling method is used for LBT. LBT > context is saved/restored during vcpu context switch path. > > Also this patch set LBT capability detection, and LBT register get and set > interface for userspace vmm, so that vm supports migration with BT > extension. > > --- > v5 ... v6: > 1. Solve compiling issue with function kvm_get_one_reg() and > kvm_set_one_reg(). > > v4 ... v5: > 1. Add feature detection for LSX/LASX from vm side, previously > LSX/LASX feature is detected from vcpu ioctl command, now both > methods are supported. > > v3 ... v4: > 1. Merge LBT feature detection for VM and VCPU into one patch. > 2. Move function declaration such as kvm_lose_lbt()/kvm_check_fcsr()/ > kvm_enable_lbt_fpu() from header file to c file, since it is only > used in one c file. > > v2 ... v3: > 1. Split KVM_LOONGARCH_VM_FEAT_LBT capability checking into three > sub-features, KVM_LOONGARCH_VM_FEAT_X86BT/KVM_LOONGARCH_VM_FEAT_ARMBT > and KVM_LOONGARCH_VM_FEAT_MIPSBT. Return success only if host > supports the sub-feature. > > v1 ... v2: > 1. With LBT register read or write interface to userpace, replace > device attr method with KVM_GET_ONE_REG method, since lbt register is > vcpu register and can be added in kvm_reg_list in future. > 2. Add vm device attr ctrl marcro KVM_LOONGARCH_VM_FEAT_CTRL, it is > used to get supported LBT feature before vm or vcpu is created. > --- > Bibo Mao (3): > LoongArch: KVM: Add HW Binary Translation extension support > LoongArch: KVM: Add LBT feature detection function > LoongArch: KVM: Add vm migration support for LBT registers > > arch/loongarch/include/asm/kvm_host.h | 8 ++ > arch/loongarch/include/asm/kvm_vcpu.h | 6 ++ > arch/loongarch/include/uapi/asm/kvm.h | 17 ++++ > arch/loongarch/kvm/exit.c | 9 ++ > arch/loongarch/kvm/vcpu.c | 128 +++++++++++++++++++++++++- > arch/loongarch/kvm/vm.c | 52 ++++++++++- > 6 files changed, 218 insertions(+), 2 deletions(-) > > > base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b > -- > 2.39.3 > >
On 2024/8/28 上午10:08, Huacai Chen wrote: > Hi, Bibo, > > I have consulted with Jiaxun offline, and he has tried his best to > propose a "scratch vcpu" solution. But unfortunately that solution is > too difficult to implement and he has nearly given up. > > So the solution in this series seems the best one, and I will queue it > for loongarch-kvm now. Thanks. There may be requirement such as there is different capability for different vCPUs, only that it is a little far from now. We can discuss and add that if there is such requirement. Because of limitation of human resource and ability, the implementation is not perfect however it can be used. Regards Bibo Mao > > Huacai > > On Tue, Jul 30, 2024 at 3:57 PM Bibo Mao <maobibo@loongson.cn> wrote: >> >> Loongson Binary Translation (LBT) is used to accelerate binary >> translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM >> eflags (eflags) and x87 fpu stack pointer (ftop). >> >> Like FPU extension, here lately enabling method is used for LBT. LBT >> context is saved/restored during vcpu context switch path. >> >> Also this patch set LBT capability detection, and LBT register get and set >> interface for userspace vmm, so that vm supports migration with BT >> extension. >> >> --- >> v5 ... v6: >> 1. Solve compiling issue with function kvm_get_one_reg() and >> kvm_set_one_reg(). >> >> v4 ... v5: >> 1. Add feature detection for LSX/LASX from vm side, previously >> LSX/LASX feature is detected from vcpu ioctl command, now both >> methods are supported. >> >> v3 ... v4: >> 1. Merge LBT feature detection for VM and VCPU into one patch. >> 2. Move function declaration such as kvm_lose_lbt()/kvm_check_fcsr()/ >> kvm_enable_lbt_fpu() from header file to c file, since it is only >> used in one c file. >> >> v2 ... v3: >> 1. Split KVM_LOONGARCH_VM_FEAT_LBT capability checking into three >> sub-features, KVM_LOONGARCH_VM_FEAT_X86BT/KVM_LOONGARCH_VM_FEAT_ARMBT >> and KVM_LOONGARCH_VM_FEAT_MIPSBT. Return success only if host >> supports the sub-feature. >> >> v1 ... v2: >> 1. With LBT register read or write interface to userpace, replace >> device attr method with KVM_GET_ONE_REG method, since lbt register is >> vcpu register and can be added in kvm_reg_list in future. >> 2. Add vm device attr ctrl marcro KVM_LOONGARCH_VM_FEAT_CTRL, it is >> used to get supported LBT feature before vm or vcpu is created. >> --- >> Bibo Mao (3): >> LoongArch: KVM: Add HW Binary Translation extension support >> LoongArch: KVM: Add LBT feature detection function >> LoongArch: KVM: Add vm migration support for LBT registers >> >> arch/loongarch/include/asm/kvm_host.h | 8 ++ >> arch/loongarch/include/asm/kvm_vcpu.h | 6 ++ >> arch/loongarch/include/uapi/asm/kvm.h | 17 ++++ >> arch/loongarch/kvm/exit.c | 9 ++ >> arch/loongarch/kvm/vcpu.c | 128 +++++++++++++++++++++++++- >> arch/loongarch/kvm/vm.c | 52 ++++++++++- >> 6 files changed, 218 insertions(+), 2 deletions(-) >> >> >> base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b >> -- >> 2.39.3 >> >>
On Wed, Aug 28, 2024 at 10:28 AM maobibo <maobibo@loongson.cn> wrote: > > > > On 2024/8/28 上午10:08, Huacai Chen wrote: > > Hi, Bibo, > > > > I have consulted with Jiaxun offline, and he has tried his best to > > propose a "scratch vcpu" solution. But unfortunately that solution is > > too difficult to implement and he has nearly given up. > > > > So the solution in this series seems the best one, and I will queue it > > for loongarch-kvm now. > Thanks. There may be requirement such as there is different capability > for different vCPUs, only that it is a little far from now. We can > discuss and add that if there is such requirement. Because of limitation > of human resource and ability, the implementation is not perfect however > it can be used. I have merged the first two patches, but the 3rd one seems to have some problems. If you send V7, please keep the first two be the same and only update the 3rd one, thanks. Huacai > > Regards > Bibo Mao > > > > Huacai > > > > On Tue, Jul 30, 2024 at 3:57 PM Bibo Mao <maobibo@loongson.cn> wrote: > >> > >> Loongson Binary Translation (LBT) is used to accelerate binary > >> translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM > >> eflags (eflags) and x87 fpu stack pointer (ftop). > >> > >> Like FPU extension, here lately enabling method is used for LBT. LBT > >> context is saved/restored during vcpu context switch path. > >> > >> Also this patch set LBT capability detection, and LBT register get and set > >> interface for userspace vmm, so that vm supports migration with BT > >> extension. > >> > >> --- > >> v5 ... v6: > >> 1. Solve compiling issue with function kvm_get_one_reg() and > >> kvm_set_one_reg(). > >> > >> v4 ... v5: > >> 1. Add feature detection for LSX/LASX from vm side, previously > >> LSX/LASX feature is detected from vcpu ioctl command, now both > >> methods are supported. > >> > >> v3 ... v4: > >> 1. Merge LBT feature detection for VM and VCPU into one patch. > >> 2. Move function declaration such as kvm_lose_lbt()/kvm_check_fcsr()/ > >> kvm_enable_lbt_fpu() from header file to c file, since it is only > >> used in one c file. > >> > >> v2 ... v3: > >> 1. Split KVM_LOONGARCH_VM_FEAT_LBT capability checking into three > >> sub-features, KVM_LOONGARCH_VM_FEAT_X86BT/KVM_LOONGARCH_VM_FEAT_ARMBT > >> and KVM_LOONGARCH_VM_FEAT_MIPSBT. Return success only if host > >> supports the sub-feature. > >> > >> v1 ... v2: > >> 1. With LBT register read or write interface to userpace, replace > >> device attr method with KVM_GET_ONE_REG method, since lbt register is > >> vcpu register and can be added in kvm_reg_list in future. > >> 2. Add vm device attr ctrl marcro KVM_LOONGARCH_VM_FEAT_CTRL, it is > >> used to get supported LBT feature before vm or vcpu is created. > >> --- > >> Bibo Mao (3): > >> LoongArch: KVM: Add HW Binary Translation extension support > >> LoongArch: KVM: Add LBT feature detection function > >> LoongArch: KVM: Add vm migration support for LBT registers > >> > >> arch/loongarch/include/asm/kvm_host.h | 8 ++ > >> arch/loongarch/include/asm/kvm_vcpu.h | 6 ++ > >> arch/loongarch/include/uapi/asm/kvm.h | 17 ++++ > >> arch/loongarch/kvm/exit.c | 9 ++ > >> arch/loongarch/kvm/vcpu.c | 128 +++++++++++++++++++++++++- > >> arch/loongarch/kvm/vm.c | 52 ++++++++++- > >> 6 files changed, 218 insertions(+), 2 deletions(-) > >> > >> > >> base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b > >> -- > >> 2.39.3 > >> > >> > >
Loongson Binary Translation (LBT) is used to accelerate binary translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). Like FPU extension, here lately enabling method is used for LBT. LBT context is saved/restored during vcpu context switch path. Also this patch set LBT capability detection, and LBT register get and set interface for userspace vmm, so that vm supports migration with BT extension. --- v5 ... v6: 1. Solve compiling issue with function kvm_get_one_reg() and kvm_set_one_reg(). v4 ... v5: 1. Add feature detection for LSX/LASX from vm side, previously LSX/LASX feature is detected from vcpu ioctl command, now both methods are supported. v3 ... v4: 1. Merge LBT feature detection for VM and VCPU into one patch. 2. Move function declaration such as kvm_lose_lbt()/kvm_check_fcsr()/ kvm_enable_lbt_fpu() from header file to c file, since it is only used in one c file. v2 ... v3: 1. Split KVM_LOONGARCH_VM_FEAT_LBT capability checking into three sub-features, KVM_LOONGARCH_VM_FEAT_X86BT/KVM_LOONGARCH_VM_FEAT_ARMBT and KVM_LOONGARCH_VM_FEAT_MIPSBT. Return success only if host supports the sub-feature. v1 ... v2: 1. With LBT register read or write interface to userpace, replace device attr method with KVM_GET_ONE_REG method, since lbt register is vcpu register and can be added in kvm_reg_list in future. 2. Add vm device attr ctrl marcro KVM_LOONGARCH_VM_FEAT_CTRL, it is used to get supported LBT feature before vm or vcpu is created. --- Bibo Mao (3): LoongArch: KVM: Add HW Binary Translation extension support LoongArch: KVM: Add LBT feature detection function LoongArch: KVM: Add vm migration support for LBT registers arch/loongarch/include/asm/kvm_host.h | 8 ++ arch/loongarch/include/asm/kvm_vcpu.h | 6 ++ arch/loongarch/include/uapi/asm/kvm.h | 17 ++++ arch/loongarch/kvm/exit.c | 9 ++ arch/loongarch/kvm/vcpu.c | 128 +++++++++++++++++++++++++- arch/loongarch/kvm/vm.c | 52 ++++++++++- 6 files changed, 218 insertions(+), 2 deletions(-) base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b