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[0/9] Misc patches for x86 CPUID

Message ID 20240814075431.339209-1-xiaoyao.li@intel.com (mailing list archive)
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Series Misc patches for x86 CPUID | expand

Message

Xiaoyao Li Aug. 14, 2024, 7:54 a.m. UTC
This series is a misc collection of patches for x86 CPUID. It contains
patches to add support for new CPUID bit, to fix the construction of
some CPUID leaves, to not expose AMD defined bits on Intel guest, and to
make invtsc migratable contioned on user_tsc_khz.

All of them are found during TDX development and testing. However, they
issues they aim to address are not TDX specific and the patches are not
TDX specific.

Xiaoyao Li (9):
  i386/cpu: Don't construct a all-zero entry for CPUID[0xD 0x3f]
  i386/cpu: Enable fdp-excptn-only and zero-fcs-fds
  i386/cpu: Add support for bits in CPUID.7_2.EDX
  i386/cpu: Construct valid CPUID leaf 5 iff CPUID_EXT_MONITOR
  i386/cpu: Construct CPUID 2 as stateful iff times > 1
  i386/cpu: Set topology info in 0x80000008.ECX only for AMD CPUs
  i386/cpu: Suppress CPUID values not defined by Intel
  i386/cpu: Drop AMD alias bits in FEAT_8000_0001_EDX for non-AMD guests
  i386/cpu: Make invtsc migratable when user sets tsc-khz explicitly

 target/i386/cpu.c     | 50 ++++++++++++++++++++++++++++++-------------
 target/i386/cpu.h     |  4 ++++
 target/i386/kvm/kvm.c | 17 +++++++++------
 3 files changed, 49 insertions(+), 22 deletions(-)