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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN1PEPF00006003.mail.protection.outlook.com (10.167.243.235) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Mon, 21 Oct 2024 05:54:33 +0000 Received: from gomati.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 21 Oct 2024 00:52:50 -0500 From: Nikunj A Dadhania To: , , , , CC: , , , , , , Subject: [PATCH v13 00/13] Add Secure TSC support for SNP guests Date: Mon, 21 Oct 2024 11:21:43 +0530 Message-ID: <20241021055156.2342564-1-nikunj@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00006003:EE_|MN0PR12MB6342:EE_ X-MS-Office365-Filtering-Correlation-Id: 9349e831-0d87-400c-628c-08dcf194d635 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700013|1800799024|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2024 05:54:33.0263 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9349e831-0d87-400c-628c-08dcf194d635 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00006003.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6342 This patchset is also available at: https://github.com/AMDESE/linux-kvm/tree/sectsc-guest-latest and is based on tip/x86/sev Overview -------- Secure TSC allows guests to securely use RDTSC/RDTSCP instructions as the parameters being used cannot be changed by hypervisor once the guest is launched. More details in the AMD64 APM Vol 2, Section "Secure TSC". In order to enable secure TSC, SEV-SNP guests need to send a TSC_INFO guest message before the APs are booted. Details from the TSC_INFO response will then be used to program the VMSA before the APs are brought up. See "SEV Secure Nested Paging Firmware ABI Specification" document (currently at https://www.amd.com/system/files/TechDocs/56860.pdf) section "TSC Info" SEV-guest driver has the implementation for guest and AMD Security Processor communication. As the TSC_INFO needs to be initialized during early boot before APs are started, move the guest messaging code from sev-guest driver to sev/core.c and provide well defined APIs to the sev-guest driver. Patches: 01-02: Patches moving SNP guest messaging code from SEV guest driver to SEV common code 03-09: SecureTSC enablement patches 10-11: Generic TSC/kvmclock improvements 12-13: SecureTSC enablement patches. Testing SecureTSC ----------------- SecureTSC hypervisor patches based on top of SEV-SNP Guest MEMFD series: https://github.com/AMDESE/linux-kvm/tree/sectsc-host-latest QEMU changes: https://github.com/nikunjad/qemu/tree/snp-securetsc-latest QEMU commandline SEV-SNP with SecureTSC: qemu-system-x86_64 -cpu EPYC-Milan-v2 -smp 4 \ -object memory-backend-memfd,id=ram1,size=1G,share=true,prealloc=false,reserve=false \ -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on \ -machine q35,confidential-guest-support=sev0,memory-backend=ram1 \ ... Changelog: ---------- v13: * Rebased on top of tip/x86/sev * Squashed CC_ATTR_GUEST_SNP_SNP_SECURE_TSC change to patch where it used. (Tom) * Fixed sparse warnings (kernel test robot) * Added patch to prevent GUEST_TSC_FREQ MSR interception(Tom) * Fix sched_clock override in common code (Sean) * Added GHCB_TERM_SECURE_TSC_KVMCLOCK reason code and use sev_es_terminate() to inform the hypervisor that KVMCLOCK was being instead of Secure TSC. v12: https://lore.kernel.org/lkml/20241009092850.197575-1-nikunj@amd.com/ * Rebased on top of v6.12-rc2 * Collected Reviewed-by (Tom) * Improve error handling in sme_enable() (Boris) * Drop handle_guest_request() copying routine (Boris) * Move VMPCK empty check inside the lock (Tom) * Drop export symbol for snp_issue_guest_request() (Tom) * Rename CC_ATTR_GUEST_SECURE_TSC as CC_ATTR_GUEST_SNP_SECURE_TSC (Tom) * Upgrade the tsc early and regular clock rating when TSC is invariant, non-stop and stable (tglx) * Initialize kvm sched clock only when the kvmclock source is selected (Sean) * Abort SecureTSC enabled guests when kvmclock is selected (Sean) * Added patch to use TSC frequency using GUEST_TSC_FREQ MSR (Sean) Nikunj A Dadhania (13): x86/sev: Carve out and export SNP guest messaging init routines x86/sev: Relocate SNP guest messaging routines to common code x86/sev: Add Secure TSC support for SNP guests x86/sev: Change TSC MSR behavior for Secure TSC enabled guests x86/sev: Prevent RDTSC/RDTSCP interception for Secure TSC enabled guests x86/sev: Prevent GUEST_TSC_FREQ MSR interception for Secure TSC enabled guests x86/sev: Mark Secure TSC as reliable clocksource x86/cpu/amd: Do not print FW_BUG for Secure TSC tsc: Use the GUEST_TSC_FREQ MSR for discovering TSC frequency tsc: Upgrade TSC clocksource rating tsc: Switch to native sched clock x86/kvmclock: Abort SecureTSC enabled guest when kvmclock is selected x86/sev: Allow Secure TSC feature for SNP guests arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/sev-common.h | 2 + arch/x86/include/asm/sev.h | 134 +++++- arch/x86/include/asm/svm.h | 6 +- include/linux/cc_platform.h | 8 + arch/x86/boot/compressed/sev.c | 3 +- arch/x86/coco/core.c | 3 + arch/x86/coco/sev/core.c | 567 +++++++++++++++++++++++- arch/x86/coco/sev/shared.c | 13 +- arch/x86/kernel/cpu/amd.c | 3 +- arch/x86/kernel/kvmclock.c | 9 + arch/x86/kernel/tsc.c | 41 ++ arch/x86/mm/mem_encrypt.c | 4 + arch/x86/mm/mem_encrypt_amd.c | 4 + drivers/virt/coco/sev-guest/sev-guest.c | 485 +------------------- arch/x86/Kconfig | 1 + drivers/virt/coco/sev-guest/Kconfig | 1 - 17 files changed, 794 insertions(+), 491 deletions(-) base-commit: 0a895c0d9b73d934de95aa0dd4e631c394bdd25d