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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-211d0f474fcsm92502505ad.213.2024.11.20.06.09.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2024 06:09:43 -0800 (PST) From: Max Hsu <max.hsu@sifive.com> Subject: [PATCH RFC v3 0/3] riscv: add Svukte extension Date: Wed, 20 Nov 2024 22:09:31 +0800 Message-Id: <20241120-dev-maxh-svukte-v3-v3-0-1e533d41ae15@sifive.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: <kvm.vger.kernel.org> List-Subscribe: <mailto:kvm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:kvm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAJztPWcC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyjHUUlJIzE vPSU3UzU4B8JSMDIxNDQ0NT3ZTUMt3cxIoM3eKy0uySVN0yY93ENBOzFDNTg8RkgyQloMaCotS 0zAqwodFKQW7OSrG1tQCbJCqIaQAAAA== X-Change-ID: 20241115-dev-maxh-svukte-v3-af46d650ac0b To: Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org> Cc: Palmer Dabbelt <palmer@sifive.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Max Hsu <max.hsu@sifive.com>, Samuel Holland <samuel.holland@sifive.com>, Deepak Gupta <debug@rivosinc.com>, Alexandre Ghiti <alexghiti@rivosinc.com> X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2572; i=max.hsu@sifive.com; h=from:subject:message-id; bh=ju5iaCTTGnlC8cKNSV/WW1suH3P3ww9XIffkT2cxxRo=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBnPe2kHNOLtJ3Nh25+lGk83izF/rgv0VNEkT6pu REZcT4K5Y6JAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCZz3tpAAKCRDSA/2dB3lA vZfUC/sHvSkPEeYcaLuBEqUc3AcV2qThswESzWxUw4n7HTrnZVEWEif4jcdPYpXLMtrBY5zGlVk FO4VpUrnYPxMYbz2NSMEqp5JeIOdWY8rBQqKYcV17s7v4XA3BfCXC9q/hXupXM2dEdLOYUGtpqq LWyPTw5fuqFEShidGJktJK740GSqg0Rh8ybvwadf6/aP0bIGEYMflZbMn2JDo9Mc3b925/WaPgH vgEPgPWoTC/c9MX6Pb+nPxvK6lE/98LSbKCLLSCJDJuo5Z5l+Li4RqRt/SvL8YeqvwOmlKVbtGk cHz0q4XRKXyCSAg68Z/n/2rX410Nw9L8j0FxDjrmINiu6yge0/J/TiS2t5YRIoxmPYye0Yiz9A9 s2goi0wDboUE1uIlMD1AHbmBSqnfSJsCEmE2TnLsnlarYRY3a3WmBh6mNNqh4vpbUOTCI0tpz1F 7zC6DVzOqR6FJ4zULNN7B0rlWhzSWStDMay5CJOKM2awK0czHIHoaHuStTJywSon057N8= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD |
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riscv: add Svukte extension
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RISC-V privileged spec will be added with Svukte extension [1] Svukte introduce senvcfg.UKTE and hstatus.HUKTE bitfield. which makes user-mode access to supervisor memory raise page faults in constant time, mitigating attacks that attempt to discover the supervisor software's address-space layout. In the Linux kernel, since the hstatus.HU bit is not enabled, the following patches only enable the use of senvcfg.UKTE. For Guest environments, because a Guest OS (not limited to Linux) may hold mappings from GVA to GPA, the Guest OS should decide whether to enable the protection provided by the Svukte extension. Therefore, the functions kvm_riscv_vcpu_isa_(enable|disable)_allowed can use default case (which will return true) in the switch-case. If the Guest environment wants to change senvcfg.UKTE, KVM already provides the senvcfg CSR swap support via kvm_riscv_vcpu_swap_in_(host|guest)_state. Thus, there is no concern about the Guest OS affecting the Host OS. The following patches add - dt-binding of Svukte ISA string - CSR bit definition, ISA detection, senvcfg.UKTE enablement in kernel - KVM ISA support for Svukte extension Changes in v3: - rebase on riscv/for-next - fixed typo in the dt-binding for the Svukte ISA string - updated the commit message for KVM support for the Svukte extension - Link to v2: https://lore.kernel.org/all/20240927-dev-maxh-svukte-rebase-2-v2-0-9afe57c33aee@sifive.com/ Changes in v2: - rebase on riscv/for-next (riscv-for-linus-6.12-mw1) - modify the description of dt-binding on Svukte ISA string - Link to v1: https://lore.kernel.org/all/20240920-dev-maxh-svukte-rebase-v1-0-7864a88a62bd@sifive.com/ Link: https://github.com/riscv/riscv-isa-manual/pull/1564 [1] Signed-off-by: Max Hsu <max.hsu@sifive.com> --- Max Hsu (3): dt-bindings: riscv: Add Svukte entry riscv: Add Svukte extension support riscv: KVM: Add Svukte extension support for Guest/VM Documentation/devicetree/bindings/riscv/extensions.yaml | 9 +++++++++ arch/riscv/include/asm/csr.h | 2 ++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpufeature.c | 5 +++++ arch/riscv/kvm/vcpu_onereg.c | 1 + 6 files changed, 19 insertions(+) --- base-commit: 0eb512779d642b21ced83778287a0f7a3ca8f2a1 change-id: 20241115-dev-maxh-svukte-v3-af46d650ac0b Best regards,