| Message ID | 20241202172134.384923-1-maz@kernel.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | KVM: arm64: Add NV timer support | expand |
On Mon, Dec 02, 2024 at 05:21:23PM +0000, Marc Zyngier wrote: > Here's another batch of NV-related patches, this time bringing in most > of the timer support for EL2 as well as nested guests. > > The code is pretty convoluted for a bunch of reasons: > > - FEAT_NV2 breaks the timer semantics by redirecting HW controls to > memory, meaning that a guest could setup a timer and never see it > firing until the next exit > > - We go try hard to reflect the timer state in memory, but that's not > great. > > - With FEAT_ECV, we can finally correctly emulate the virtual timer, > but this emulation is pretty costly > > - As a way to make things suck less, we handle timer reads as early as > possible, and only defer writes to the normal trap handling > > - Finally, some implementations are badly broken, and require some > hand-holding, irrespective of NV support. So we try and reuse the NV > infrastructure to make them usable. This could be further optimised, > but I'm running out of patience for this sort of HW. > > What this is not implementing is support for CNTPOFF_EL2. It appears > that the architecture doesn't let you correctly emulate it, so I guess > this will be trap/emulate for the foreseeable future. > > This series is on top of v6.13-rc1, and has been tested on my usual M2 > setup, but also on a Snapdragon X1 Elite devkit. I would like to thank > Qualcomm for the free hardware with no strings (nor support) attached! This series is looking pretty good to me, but I think it'd be good to remap "EL0 timer" -> "EL1 timer" throughout this series to match the architectural term.
Hi Marc, On Mon, 2 Dec 2024 17:21:23 +0000, Marc Zyngier <maz@kernel.org> wrote: > Here's another batch of NV-related patches, this time bringing in most > of the timer support for EL2 as well as nested guests. > > The code is pretty convoluted for a bunch of reasons: > > - FEAT_NV2 breaks the timer semantics by redirecting HW controls to > memory, meaning that a guest could setup a timer and never see it > firing until the next exit > > - We go try hard to reflect the timer state in memory, but that's not > great. > > - With FEAT_ECV, we can finally correctly emulate the virtual timer, > but this emulation is pretty costly > > - As a way to make things suck less, we handle timer reads as early as > possible, and only defer writes to the normal trap handling > > - Finally, some implementations are badly broken, and require some > hand-holding, irrespective of NV support. So we try and reuse the NV > infrastructure to make them usable. This could be further optimised, > but I'm running out of patience for this sort of HW. > > What this is not implementing is support for CNTPOFF_EL2. It appears > that the architecture doesn't let you correctly emulate it, so I guess > this will be trap/emulate for the foreseeable future. > > This series is on top of v6.13-rc1, and has been tested on my usual M2 > setup, but also on a Snapdragon X1 Elite devkit. I would like to thank > Qualcomm for the free hardware with no strings (nor support) attached! > > If you are feeling brave, you can run the whole thing from [1]. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next > I was feeling brave, and I think I see an issue in the cpufeature change in the kvm-arm64/nv-e2h-select branch that's a part of kvm-arm64/nv-next. In d75a4820a897 ("arm64: cpufeature: Handle NV_frac as a synonym of NV2"), I don't see NV_frac being added to the FTR bits. I believe that means it will get sanitized out and consequently not seen by the NV feature detection code. Does that commit also need: diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9fa8bd77ae0..f97459e160b 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -480,6 +480,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = { static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = { S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0), + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_NV_frac_SHIFT, 4, 0), ARM64_FTR_END, }; Thanks, Chase
Hi Chase, On Mon, 09 Dec 2024 14:24:29 +0000, Chase Conklin <chase.conklin@arm.com> wrote: > > Hi Marc, > > On Mon, 2 Dec 2024 17:21:23 +0000, Marc Zyngier <maz@kernel.org> > wrote: > > > If you are feeling brave, you can run the whole thing from [1]. > > > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next > > > > I was feeling brave, and I think I see an issue in the cpufeature change > in the kvm-arm64/nv-e2h-select branch that's a part of > kvm-arm64/nv-next. In d75a4820a897 ("arm64: cpufeature: Handle NV_frac as a synonym of NV2"), > I don't see NV_frac being added to the FTR bits. I believe that means it > will get sanitized out and consequently not seen by the NV feature > detection code. Does that commit also need: > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 9fa8bd77ae0..f97459e160b 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -480,6 +480,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = { > > static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = { > S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0), > + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_NV_frac_SHIFT, 4, 0), > ARM64_FTR_END, > }; Ah, I always get tripped by that one. You are absolutely correct, this is needed. I'll fold that in. Thanks again, M.
Here's another batch of NV-related patches, this time bringing in most of the timer support for EL2 as well as nested guests. The code is pretty convoluted for a bunch of reasons: - FEAT_NV2 breaks the timer semantics by redirecting HW controls to memory, meaning that a guest could setup a timer and never see it firing until the next exit - We go try hard to reflect the timer state in memory, but that's not great. - With FEAT_ECV, we can finally correctly emulate the virtual timer, but this emulation is pretty costly - As a way to make things suck less, we handle timer reads as early as possible, and only defer writes to the normal trap handling - Finally, some implementations are badly broken, and require some hand-holding, irrespective of NV support. So we try and reuse the NV infrastructure to make them usable. This could be further optimised, but I'm running out of patience for this sort of HW. What this is not implementing is support for CNTPOFF_EL2. It appears that the architecture doesn't let you correctly emulate it, so I guess this will be trap/emulate for the foreseeable future. This series is on top of v6.13-rc1, and has been tested on my usual M2 setup, but also on a Snapdragon X1 Elite devkit. I would like to thank Qualcomm for the free hardware with no strings (nor support) attached! If you are feeling brave, you can run the whole thing from [1]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next Marc Zyngier (11): KVM: arm64: nv: Add handling of EL2-specific timer registers KVM: arm64: nv: Sync nested timer state with FEAT_NV2 KVM: arm64: nv: Publish emulated timer interrupt state in the in-memory state KVM: arm64: nv: Use FEAT_ECV to trap access to EL0 timers KVM: arm64: nv: Accelerate EL0 timer read accesses when FEAT_ECV in use KVM: arm64: nv: Acceletate EL0 counter accesses from hypervisor context KVM: arm64: Handle counter access early in non-HYP context KVM: arm64: nv: Add trap routing for CNTHCTL_EL2.EL1{NVPCT,NVVCT,TVT,TVCT} KVM: arm64: nv: Propagate CNTHCTL_EL2.EL1NV{P,V}CT bits KVM: arm64: nv: Sanitise CNTHCTL_EL2 KVM: arm64: Work around x1e's CNTVOFF_EL2 bogosity arch/arm64/include/asm/cputype.h | 2 + arch/arm64/include/asm/kvm_host.h | 2 +- arch/arm64/include/asm/sysreg.h | 4 + arch/arm64/kernel/cpu_errata.c | 8 ++ arch/arm64/kernel/image-vars.h | 3 + arch/arm64/kvm/arch_timer.c | 177 +++++++++++++++++++++--- arch/arm64/kvm/arm.c | 3 + arch/arm64/kvm/emulate-nested.c | 58 +++++++- arch/arm64/kvm/hyp/include/hyp/switch.h | 39 ++++-- arch/arm64/kvm/hyp/nvhe/timer-sr.c | 16 ++- arch/arm64/kvm/hyp/vhe/switch.c | 84 +++++++++++ arch/arm64/kvm/nested.c | 15 ++ arch/arm64/kvm/sys_regs.c | 146 ++++++++++++++++++- arch/arm64/tools/cpucaps | 1 + include/clocksource/arm_arch_timer.h | 6 + include/kvm/arm_arch_timer.h | 23 +++ 16 files changed, 546 insertions(+), 41 deletions(-)