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[v2,0/2] Extend 8-byte PCI load/store support to x86 arch

Message ID 20241203184158.172492-1-ramesh.thomas@intel.com (mailing list archive)
Headers show
Series Extend 8-byte PCI load/store support to x86 arch | expand

Message

Ramesh Thomas Dec. 3, 2024, 6:41 p.m. UTC 
This patch series extends the recently added 8-byte PCI load/store
support to the x86 architecture. 

Refer patch series adding above support:
https://lore.kernel.org/all/20240522150651.1999584-1-gbayer@linux.ibm.com/

The 8-byte implementations are enclosed inside #ifdef checks of the
macros "ioread64" and "iowrite64". These macros don't get defined if
CONFIG_GENERIC_IOMAP is defined. CONFIG_GENERIC_IOMAP gets defined for
x86 and hence the macros are undefined. Due to this the 8-byte support
was not enabled for x86 architecture.

To resolve this, include the header file io-64-nonatomic-lo-hi.h that
maps the ioread64 and iowrite64 macros to a generic implementation in
lib/iomap.c. This was the intention of defining CONFIG_GENERIC_IOMAP.

Tested using a pass-through PCI device bound to vfio-pci driver and
doing BAR reads and writes that trigger calls to
vfio_pci_core_do_io_rw() that does the 8-byte reads and writes.

Patch history:
v2: Based on Jason's feedback moved #include io-64-nonatomic-lo-hi.h
to vfio_pci_rdwr.c and replaced #ifdef checks of iowrite64 and ioread64
macros with checks for CONFIG_64BIT.

https://lore.kernel.org/all/20240522232125.548643-1-ramesh.thomas@intel.com/
https://lore.kernel.org/all/20240524140013.GM69273@ziepe.ca/
https://lore.kernel.org/all/bfb273b2-fc5e-4a8b-a40d-56996fc9e0af@intel.com/

Ramesh Thomas (2):
  vfio/pci: Enable iowrite64 and ioread64 for vfio pci
  vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64

 drivers/vfio/pci/vfio_pci_rdwr.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)