[kvm-unit-tests,0/3] riscv: Improved bare metal support

Message

Samuel Holland Dec. 10, 2024, 4:44 a.m. UTC

Here are a few patches which are just enough to run the SBI unit tests
in a bare metal environment, under U-Boot on boards with a UART needing
32-bit MMIO (which is a rather common configuration in my experience).
Though I wonder if we should prefer the SBI debug console extension for
puts() output when available.

Samuel Holland (3):
  riscv: Add Image header to flat binaries
  riscv: Rate limit UART output to avoid FIFO overflows
  riscv: Support UARTs with different I/O widths

 lib/riscv/io.c | 47 +++++++++++++++++++++++++++++++++++++++++++++--
 riscv/cstart.S | 16 +++++++++++++++-
 2 files changed, 60 insertions(+), 3 deletions(-)