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[kvm-unit-tests,v6,0/5] riscv: add SBI SSE extension tests

Message ID 20250110111247.2963146-1-cleger@rivosinc.com (mailing list archive)
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Series riscv: add SBI SSE extension tests | expand

Message

Clément Léger Jan. 10, 2025, 11:12 a.m. UTC
This series adds an individual test for SBI SSE extension as well as
needed infrastructure for SSE support. It also adds test specific
asm-offsets generation to use custom OFFSET and DEFINE from the test
directory.

---

V6:
 - Add missing $(generated-file) dependencies for "-deps" objects
 - Split SSE entry from sbi-asm.S to sse-asm.S and all SSE core functions
   since it will be useful for other tests as well (dbltrp).

V5:
 - Update event ranges based on latest spec
 - Rename asm-offset-test.c to sbi-asm-offset.c

V4:
 - Fix typo sbi_ext_ss_fid -> sbi_ext_sse_fid
 - Add proper asm-offset generation for tests
 - Move SSE specific file from lib/riscv to riscv/

V3:
 - Add -deps variable for test specific dependencies
 - Fix formatting errors/typo in sbi.h
 - Add missing double trap event
 - Alphabetize sbi-sse.c includes
 - Fix a6 content after unmasking event
 - Add SSE HART_MASK/UNMASK test
 - Use mv instead of move
 - move sbi_check_sse() definition in sbi.c
 - Remove sbi_sse test from unitests.cfg

V2:
 - Rebased on origin/master and integrate it into sbi.c tests

Clément Léger (5):
  kbuild: allow multiple asm-offsets file to be generated
  riscv: use asm-offsets to generate SBI_EXT_HSM values
  riscv: Add "-deps" handling for tests
  riscv: lib: Add SBI SSE extension definitions
  riscv: sbi: Add SSE extension tests

 scripts/asm-offsets.mak |  22 +-
 riscv/Makefile          |  12 +-
 lib/riscv/asm/csr.h     |   2 +
 lib/riscv/asm/sbi.h     |  89 ++++
 riscv/sse.h             |  41 ++
 riscv/sbi-asm.S         |   6 +-
 riscv/sse-asm.S         | 104 +++++
 riscv/sbi-asm-offsets.c |  20 +
 riscv/sbi-sse.c         | 936 ++++++++++++++++++++++++++++++++++++++++
 riscv/sbi.c             |   3 +
 riscv/sse.c             | 132 ++++++
 riscv/.gitignore        |   1 +
 12 files changed, 1355 insertions(+), 13 deletions(-)
 create mode 100644 riscv/sse.h
 create mode 100644 riscv/sse-asm.S
 create mode 100644 riscv/sbi-asm-offsets.c
 create mode 100644 riscv/sbi-sse.c
 create mode 100644 riscv/sse.c
 create mode 100644 riscv/.gitignore