Show patches with: Submitter = Lawrence Hunter       |    State = Action Required       |   165 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,19/19] target/riscv: Expose Zvk* and Zvb[b,c] cpu properties Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,18/19] target/riscv: Add Zvksed ISA extension support Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,17/19] crypto: Add SM4 constant parameter CK Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,16/19] crypto: Create sm4_subword Add RISC-V vector cryptographic instruction set support - 2 - --- 2023-04-28 Lawrence Hunter New
[v3,15/19] target/riscv: Add Zvkg ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,14/19] target/riscv: Add Zvksh ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,13/19] target/riscv: Add Zvknh ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,12/19] target/riscv: Add Zvkned ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,11/19] target/riscv: Add Zvbb ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,10/19] qemu/host-utils.h: Add clz and ctz functions for lower-bit integers Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,09/19] tcg: Add andcs and rotrs tcg gvec ops Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,08/19] qemu/bitops.h: Limit rotate amounts Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,07/19] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,06/19] target/riscv: Refactor translation of vector-widening instruction Add RISC-V vector cryptographic instruction set support - 2 - --- 2023-04-28 Lawrence Hunter New
[v3,05/19] target/riscv: Move vector translation checks Add RISC-V vector cryptographic instruction set support - 2 - --- 2023-04-28 Lawrence Hunter New
[v3,04/19] target/riscv: Add Zvbc ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-28 Lawrence Hunter New
[v3,03/19] target/riscv: Remove redundant "cpu_vl == 0" checks Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v3,02/19] target/riscv: Refactor vector-vector translation macro Add RISC-V vector cryptographic instruction set support - 3 - --- 2023-04-28 Lawrence Hunter New
[v3,01/19] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-28 Lawrence Hunter New
[v2,17/17] target/riscv: Expose Zvk* and Zvb[b,c] cpu properties Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,16/17] target/riscv: Add Zvksed ISA extension support Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,15/17] crypto: Add SM4 constant parameter CK Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,14/17] crypto: Create sm4_subword Add RISC-V vector cryptographic instruction set support - 2 - --- 2023-04-17 Lawrence Hunter New
[v2,13/17] target/riscv: Add Zvkg ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,12/17] target/riscv: Add Zvksh ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,11/17] target/riscv: Add Zvknh ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,10/17] target/riscv: Add Zvkned ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,09/17] target/riscv: Add Zvbb ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,08/17] qemu/host-utils.h: Add clz and ctz functions for lower-bit integers Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,07/17] qemu/bitops.h: Limit rotate amounts Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,06/17] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,05/17] target/riscv: Refactor translation of vector-widening instruction Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,04/17] target/riscv: Move vector translation checks Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-04-17 Lawrence Hunter New
[v2,03/17] target/riscv: Add Zvbc ISA extension support Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[v2,02/17] target/riscv: Refactor vector-vector translation macro Add RISC-V vector cryptographic instruction set support - 2 - --- 2023-04-17 Lawrence Hunter New
[v2,01/17] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-04-17 Lawrence Hunter New
[45/45] target/riscv: Expose Zvksed property Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[44/45] target/riscv: Add Zvksed support Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[43/45] target/riscv: Add zvksed cfg property Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[42/45] crypto: Add SM4 constant parameter CK Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[41/45] crypto: Create sm4_subword Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[40/45] target/riscv: Expose zvkg cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[39/45] target/riscv: Add vghsh.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[38/45] target/riscv: Add vgmul.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[37/45] target/riscv: Add zvkg cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[36/45] target/riscv: Expose zvksh cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[35/45] target/riscv: Add vsm3c.vi decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[34/45] target/riscv: Add vsm3me.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[33/45] target/riscv: Add zvksh cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[32/45] target/riscv: Expose zvknh cpu properties Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[31/45] target/riscv: Add vsha2c[hl].vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[30/45] target/riscv: Add vsha2ms.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[29/45] target/riscv: Add zvknh cpu properties Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[28/45] target/riscv: Expose zvkned cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[27/45] target/riscv: Add vaeskf2.vi decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[26/45] target/riscv: Add vaeskf1.vi decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[25/45] target/riscv: Add vaesem.vs decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[24/45] target/riscv: Add vaesem.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[23/45] target/riscv: Add vaesz.vs decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[22/45] target/riscv: Add vaesdm.vs decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[21/45] target/riscv: Add vaesdm.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[20/45] target/riscv: Add vaesdf.vs decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[19/45] target/riscv: Add vaesdf.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[18/45] target/riscv: Add vaesef.vs decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[17/45] target/riscv: Add vaesef.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[16/45] target/riscv: Add zvkned cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[15/45] target/riscv: Expose zvkb cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[14/45] target/riscv: Add vandn.[vv,vx] decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[13/45] target/riscv: Add vrev8.v decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[12/45] target/riscv: Add vbrev8.v decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[11/45] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[10/45] target/riscv: Add vrol.[vv,vx] and vror.[vv,vx,vi] decoding, translation and execution supp… Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[09/45] qemu/bitops.h: Limit rotate amounts Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[08/45] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[07/45] target/riscv: Add vclmulh.vx decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[06/45] target/riscv: Add vclmulh.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[05/45] target/riscv: Add vclmul.vx decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[04/45] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[03/45] target/riscv: Add vclmul.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[02/45] target/riscv: Refactor some of the generic vector functionality Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[01/45] target/riscv: Add zvkb cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[45/45] target/riscv: Expose Zvksed property Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[44/45] target/riscv: Add Zvksed support Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[43/45] target/riscv: Add zvksed cfg property Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[42/45] crypto: Add SM4 constant parameter CK Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[41/45] crypto: Create sm4_subword Add RISC-V vector cryptographic instruction set support - 1 - --- 2023-03-10 Lawrence Hunter New
[40/45] target/riscv: Expose zvkg cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[39/45] target/riscv: Add vghsh.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[38/45] target/riscv: Add vgmul.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[37/45] target/riscv: Add zvkg cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[36/45] target/riscv: Expose zvksh cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[35/45] target/riscv: Add vsm3c.vi decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[34/45] target/riscv: Add vsm3me.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[33/45] target/riscv: Add zvksh cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[32/45] target/riscv: Expose zvknh cpu properties Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[31/45] target/riscv: Add vsha2c[hl].vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[30/45] target/riscv: Add vsha2ms.vv decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[29/45] target/riscv: Add zvknh cpu properties Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[28/45] target/riscv: Expose zvkned cpu property Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
[27/45] target/riscv: Add vaeskf2.vi decoding, translation and execution support Add RISC-V vector cryptographic instruction set support - - - --- 2023-03-10 Lawrence Hunter New
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