@@ -63,6 +63,8 @@ struct IOAPICState {
uint32_t irr;
uint64_t ioredtbl[IOAPIC_NUM_PINS];
+ uint64_t default_base_address;
+ uint64_t current_base_address;
};
static IOAPICState *ioapics[MAX_IOAPICS];
@@ -237,6 +239,7 @@ static int ioapic_pre_load(void *opaque)
/* in case we are loading version 1, set these to sane values */
s->irr = 0;
+ s->current_base_address = s->default_base_address;
return 0;
}
@@ -249,6 +252,7 @@ static const VMStateDescription vmstate_ioapic = {
.fields = (VMStateField []) {
VMSTATE_UINT8(id, IOAPICState),
VMSTATE_UINT8(ioregsel, IOAPICState),
+ VMSTATE_UINT64_V(current_base_address, IOAPICState, 2),
VMSTATE_UINT32_V(irr, IOAPICState, 2),
VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS),
VMSTATE_END_OF_LIST()
@@ -260,6 +264,8 @@ static void ioapic_reset(DeviceState *d)
IOAPICState *s = DO_UPCAST(IOAPICState, busdev.qdev, d);
int i;
+ s->current_base_address = s->default_base_address;
+ sysbus_mmio_map(&s->busdev, 0, s->current_base_address);
s->id = 0;
s->ioregsel = 0;
s->irr = 0;
@@ -279,6 +285,17 @@ static CPUWriteMemoryFunc * const ioapic_mem_write[3] = {
ioapic_mem_writel,
};
+void ioapic_set_base_address(DeviceState *d, target_phys_addr_t addr)
+{
+ IOAPICState *s = DO_UPCAST(IOAPICState, busdev.qdev, d);
+
+ s->current_base_address = addr;
+ if (!s->default_base_address) {
+ s->default_base_address = addr;
+ }
+ sysbus_mmio_map(&s->busdev, 0, addr);
+}
+
static int ioapic_init1(SysBusDevice *dev)
{
IOAPICState *s = FROM_SYSBUS(IOAPICState, dev);
@@ -17,4 +17,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
+#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
+
void ioapic_eio_broadcast(int vector);
+
+void ioapic_set_base_address(DeviceState *d, target_phys_addr_t addr);
@@ -25,6 +25,7 @@
#include "hw.h"
#include "pc.h"
#include "apic.h"
+#include "ioapic.h"
#include "pci.h"
#include "usb-uhci.h"
#include "usb-ohci.h"
@@ -46,13 +47,11 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static void ioapic_init(IsaIrqState *isa_irq_state)
{
DeviceState *dev;
- SysBusDevice *d;
unsigned int i;
dev = qdev_create(NULL, "ioapic");
qdev_init_nofail(dev);
- d = sysbus_from_qdev(dev);
- sysbus_mmio_map(d, 0, 0xfec00000);
+ ioapic_set_base_address(dev, IOAPIC_DEFAULT_BASE_ADDRESS);
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);