From patchwork Tue Mar 3 04:02:50 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang" X-Patchwork-Id: 9637 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n2344WKA030766 for ; Tue, 3 Mar 2009 04:04:32 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751777AbZCCEEa (ORCPT ); Mon, 2 Mar 2009 23:04:30 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753596AbZCCEEa (ORCPT ); Mon, 2 Mar 2009 23:04:30 -0500 Received: from mga01.intel.com ([192.55.52.88]:55439 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751777AbZCCEE3 (ORCPT ); Mon, 2 Mar 2009 23:04:29 -0500 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 02 Mar 2009 19:57:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.38,293,1233561600"; d="scan'208,223";a="669821637" Received: from pgsmsx603.gar.corp.intel.com ([10.221.43.87]) by fmsmga001.fm.intel.com with ESMTP; 02 Mar 2009 20:08:16 -0800 Received: from pdsmsx602.ccr.corp.intel.com (172.16.12.184) by pgsmsx603.gar.corp.intel.com (10.221.43.87) with Microsoft SMTP Server (TLS) id 8.1.311.2; Tue, 3 Mar 2009 12:04:06 +0800 Received: from pdsmsx502.ccr.corp.intel.com ([172.16.12.96]) by pdsmsx602.ccr.corp.intel.com ([172.16.12.184]) with mapi; Tue, 3 Mar 2009 12:04:05 +0800 From: "Zhang, Yang" To: "Zhang, Yang" , "kvm-ia64@vger.kernel.org" CC: "kvm@vger.kernel.org" , Avi Kivity , "Zhang, Xiantao" Date: Tue, 3 Mar 2009 12:02:50 +0800 Subject: RE: [PATCH] kvm : qemu : fix compilation error in kvm-userspace for ia64 Thread-Topic: [PATCH] kvm : qemu : fix compilation error in kvm-userspace for ia64 Thread-Index: AcmbsX1Y/2MSKqICRhSbY+r2u7gMtQAAtzrw Message-ID: <10C63FAD690C13458F0B32BCED571F1406D677B9@pdsmsx502.ccr.corp.intel.com> References: <10C63FAD690C13458F0B32BCED571F1406D6778C@pdsmsx502.ccr.corp.intel.com> In-Reply-To: <10C63FAD690C13458F0B32BCED571F1406D6778C@pdsmsx502.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi please drop the previous patch. This is the modifide patch. thanks From 4cdda47ee9d1fb19697eed36b82c1d8d614a2d4e Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Mon, 2 Mar 2009 22:56:08 -0500 Subject: [PATCH] kvm : qemu : fix compilation error in kvm-userspace for ia64 when using make in kernel, it can not find msidef.h. This patch fix this. And IA64 does not need apic_set_irq_delivered(). Signed-off-by: Yang Zhang --- kernel/include-compat/asm-ia64/msidef.h | 42 +++++++++++++++++++++++++++++++ qemu/hw/i8259.c | 2 + qemu/hw/ipf.c | 2 +- 3 files changed, 45 insertions(+), 1 deletions(-) create mode 100644 kernel/include-compat/asm-ia64/msidef.h diff --git a/kernel/include-compat/asm-ia64/msidef.h b/kernel/include-compat/asm-ia64/msidef.h new file mode 100644 index 0000000..592c104 --- /dev/null +++ b/kernel/include-compat/asm-ia64/msidef.h @@ -0,0 +1,42 @@ +#ifndef _IA64_MSI_DEF_H +#define _IA64_MSI_DEF_H + +/* + * Shifts for APIC-based data + */ + +#define MSI_DATA_VECTOR_SHIFT 0 +#define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT) +#define MSI_DATA_VECTOR_MASK 0xffffff00 + +#define MSI_DATA_DELIVERY_MODE_SHIFT 8 +#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) +#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) + +#define MSI_DATA_LEVEL_SHIFT 14 +#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) +#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) + +#define MSI_DATA_TRIGGER_SHIFT 15 +#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) +#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) + +/* + * Shift/mask fields for APIC-based bus address + */ + +#define MSI_ADDR_DEST_ID_SHIFT 4 +#define MSI_ADDR_HEADER 0xfee00000 + +#define MSI_ADDR_DEST_ID_MASK 0xfff0000f +#define MSI_ADDR_DEST_ID_CPU(cpu) ((cpu) << MSI_ADDR_DEST_ID_SHIFT) + +#define MSI_ADDR_DEST_MODE_SHIFT 2 +#define MSI_ADDR_DEST_MODE_PHYS (0 << MSI_ADDR_DEST_MODE_SHIFT) +#define MSI_ADDR_DEST_MODE_LOGIC (1 << MSI_ADDR_DEST_MODE_SHIFT) + +#define MSI_ADDR_REDIRECTION_SHIFT 3 +#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) +#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) + +#endif/* _IA64_MSI_DEF_H */ diff --git a/qemu/hw/i8259.c b/qemu/hw/i8259.c index 9cb3941..025f993 100644 --- a/qemu/hw/i8259.c +++ b/qemu/hw/i8259.c @@ -189,8 +189,10 @@ static void i8259_set_irq(void *opaque, int irq, int level) if (kvm_enabled()) { int pic_ret; if (kvm_set_irq(irq, level, &pic_ret)) { +#ifndef TARGET_IA64 if (pic_ret != 0) apic_set_irq_delivered(); +#endif return; } } diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c index eb9aaec..73dac18 100644 --- a/qemu/hw/ipf.c +++ b/qemu/hw/ipf.c @@ -701,7 +701,7 @@ void ioapic_set_irq(void *opaque, int irq_num, int level) ioapic_irq_count[vector] -= 1; if (kvm_enabled()) { - if (kvm_set_irq(vector, ioapic_irq_count[vector] == 0)) + if (kvm_set_irq(vector, ioapic_irq_count[vector] == 0, NULL)) return; } }