diff mbox

KVM: IA64: enable external interrupt in vmm

Message ID 10C63FAD690C13458F0B32BCED571F140E29AF79@pdsmsx502.ccr.corp.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Zhang, Yang March 25, 2009, 10:27 a.m. UTC
From 2cf75eff171ef823b3b17c945504d0233a6bd427 Mon Sep 17 00:00:00 2001
From: Yang Zhang <yang.zhang@intel.com>
Date: Mon, 23 Mar 2009 03:31:04 -0400
Subject: [PATCH] KVM: IA64: enable external interrupt in vmm

In the previous version, the interrupt bit is cleared when in
the vmm. This patch opens the bit and the externanl interrupt can
be deal with when in the vmm. It will improve the I/O performance.

Signed-off-by: Yang Zhang <yang.zhang@intel.com>
---
 arch/ia64/kvm/process.c |    5 +++++
 arch/ia64/kvm/vmm_ivt.S |   18 +++++++++---------
 arch/ia64/kvm/vtlb.c    |    3 +++
 3 files changed, 17 insertions(+), 9 deletions(-)

Comments

Avi Kivity March 25, 2009, 10:35 a.m. UTC | #1
Zhang, Yang wrote:
> From 2cf75eff171ef823b3b17c945504d0233a6bd427 Mon Sep 17 00:00:00 2001
> From: Yang Zhang <yang.zhang@intel.com>
> Date: Mon, 23 Mar 2009 03:31:04 -0400
> Subject: [PATCH] KVM: IA64: enable external interrupt in vmm
>
> In the previous version, the interrupt bit is cleared when in
> the vmm. This patch opens the bit and the externanl interrupt can
> be deal with when in the vmm. It will improve the I/O performance.
>   

I'm surprised it doesn't work this way already.  What happens now if the 
guest disables interrupts and spins?
Zhang, Yang March 25, 2009, 11:45 a.m. UTC | #2
Avi Kivity wrote:
> I'm surprised it doesn't work this way already.  What happens now if
> the guest disables interrupts and spins?
when vmm disables interrupt, all the external interrupts are pending 
until return back to the guest. and this will degrade the i/o performance.--
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Avi Kivity March 25, 2009, 11:54 a.m. UTC | #3
Zhang, Yang wrote:
> Avi Kivity wrote:
>   
>> I'm surprised it doesn't work this way already.  What happens now if
>> the guest disables interrupts and spins?
>>     
> when vmm disables interrupt, all the external interrupts are pending 
> until return back to the guest. and this will degrade the i/o performance.

Oh I misunderstood.  When the guest us running interrupts are enabled, 
this was true before.  The change enables interrupts in the monitor, so 
it improves responsiveness.
Zhang, Yang March 25, 2009, 11:57 a.m. UTC | #4
Avi Kivity wrote:
> Oh I misunderstood.  When the guest us running interrupts are enabled,
> this was true before.  The change enables interrupts in the monitor,
> so it improves responsiveness.
yes--
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Avi Kivity March 26, 2009, 8:58 a.m. UTC | #5
Zhang, Yang wrote:
> From 2cf75eff171ef823b3b17c945504d0233a6bd427 Mon Sep 17 00:00:00 2001
> From: Yang Zhang <yang.zhang@intel.com>
> Date: Mon, 23 Mar 2009 03:31:04 -0400
> Subject: [PATCH] KVM: IA64: enable external interrupt in vmm
>
> In the previous version, the interrupt bit is cleared when in
> the vmm. This patch opens the bit and the externanl interrupt can
> be deal with when in the vmm. It will improve the I/O performance.
>   

Applied, thanks.
diff mbox

Patch

diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index b1dc809..a8f84da 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -652,20 +652,25 @@  void  kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
 		unsigned long isr, unsigned long iim)
 {
 	struct kvm_vcpu *v = current_vcpu;
+	long psr;
 
 	if (ia64_psr(regs)->cpl == 0) {
 		/* Allow hypercalls only when cpl = 0.  */
 		if (iim == DOMN_PAL_REQUEST) {
+			local_irq_save(psr);
 			set_pal_call_data(v);
 			vmm_transition(v);
 			get_pal_call_result(v);
 			vcpu_increment_iip(v);
+			local_irq_restore(psr);
 			return;
 		} else if (iim == DOMN_SAL_REQUEST) {
+			local_irq_save(psr);
 			set_sal_call_data(v);
 			vmm_transition(v);
 			get_sal_call_result(v);
 			vcpu_increment_iip(v);
+			local_irq_restore(psr);
 			return;
 		}
 	}
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S
index 3ef1a01..40920c6 100644
--- a/arch/ia64/kvm/vmm_ivt.S
+++ b/arch/ia64/kvm/vmm_ivt.S
@@ -95,7 +95,7 @@  GLOBAL_ENTRY(kvm_vmm_panic)
 	;;
 	srlz.i    // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.
 	addl r14=@gprel(ia64_leave_hypervisor),gp
 	;;
 	KVM_SAVE_REST
@@ -249,7 +249,7 @@  ENTRY(kvm_break_fault)
 	;;
 	srlz.i         // guarantee that interruption collection is on
 	;;
-	//(p15)ssm psr.i               // restore psr.i
+	(p15)ssm psr.i               // restore psr.i
 	addl r14=@gprel(ia64_leave_hypervisor),gp
 	;;
 	KVM_SAVE_REST
@@ -439,7 +439,7 @@  kvm_dispatch_vexirq:
 	;;
 	srlz.i // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.i
 	adds r3=8,r2                // set up second base pointer
 	;;
 	KVM_SAVE_REST
@@ -819,7 +819,7 @@  ENTRY(kvm_dtlb_miss_dispatch)
 	;;
 	srlz.i     // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.i
 	addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
 	;;
 	KVM_SAVE_REST
@@ -842,7 +842,7 @@  ENTRY(kvm_itlb_miss_dispatch)
 	;;
 	srlz.i   // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.i
 	addl r14=@gprel(ia64_leave_hypervisor),gp
 	;;
 	KVM_SAVE_REST
@@ -871,7 +871,7 @@  ENTRY(kvm_dispatch_reflection)
 	;;
 	srlz.i   // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.i
 	addl r14=@gprel(ia64_leave_hypervisor),gp
 	;;
 	KVM_SAVE_REST
@@ -898,7 +898,7 @@  ENTRY(kvm_dispatch_virtualization_fault)
 	;;
 	srlz.i    // guarantee that interruption collection is on
 	;;
-	//(p15) ssm psr.i               // restore psr.i
+	(p15) ssm psr.i               // restore psr.i
 	addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
 	;;
 	KVM_SAVE_REST
@@ -920,7 +920,7 @@  ENTRY(kvm_dispatch_interrupt)
 	;;
 	srlz.i
 	;;
-	//(p15) ssm psr.i
+	(p15) ssm psr.i
 	addl r14=@gprel(ia64_leave_hypervisor),gp
 	;;
 	KVM_SAVE_REST
@@ -1333,7 +1333,7 @@  hostret =   r24
 	;;
 (p7)    srlz.i
 	;;
-//(p6)    ssm psr.i
+(p6)    ssm psr.i
 	;;
 	mov rp=rpsave
 	mov ar.pfs=pfssave
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index 38232b3..d46e267 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -253,7 +253,8 @@  u64 guest_vhpt_lookup(u64 iha, u64 *pte)
 			"(p7) st8 [%2]=r9;;"
 			"ssm psr.ic;;"
 			"srlz.d;;"
-			/* "ssm psr.i;;" Once interrupts in vmm open, need fix*/
+			"ssm psr.i;;"
+			"srlz.d;;"
 			: "=r"(ret) : "r"(iha), "r"(pte):"memory");
 
 	return ret;