From patchwork Fri May 15 08:22:16 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 24003 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n4F8N3T3020130 for ; Fri, 15 May 2009 08:23:04 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760947AbZEOIWd (ORCPT ); Fri, 15 May 2009 04:22:33 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1760904AbZEOIWb (ORCPT ); Fri, 15 May 2009 04:22:31 -0400 Received: from cantor2.suse.de ([195.135.220.15]:58293 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760868AbZEOIWU (ORCPT ); Fri, 15 May 2009 04:22:20 -0400 Received: from relay2.suse.de (relay-ext.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 1077079727; Fri, 15 May 2009 10:22:20 +0200 (CEST) From: Alexander Graf To: kvm@vger.kernel.org Cc: joerg.roedel@amd.com Subject: [PATCH 2/6] MMU: don't bail on PAT bits in PTE Date: Fri, 15 May 2009 10:22:16 +0200 Message-Id: <1242375740-31222-3-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1242375740-31222-2-git-send-email-agraf@suse.de> References: <1242375740-31222-1-git-send-email-agraf@suse.de> <1242375740-31222-2-git-send-email-agraf@suse.de> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org A 64bit PTE can have bit7 set to 1 which means "Use this bit for the PAT". Currently KVM's MMU code treats this bit as reserved, even though it's not. As long as we're not required to make use of the PAT bits which is only required for DMA/MMIO from my understanding, we can safely ignore it. Hyper-V uses this bit for kernel PTEs. Signed-off-by: Alexander Graf --- arch/x86/kvm/mmu.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 8fcdae9..cce055a 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -2169,7 +2169,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) context->rsvd_bits_mask[1][1] = exb_bit_rsvd | rsvd_bits(maxphyaddr, 51) | rsvd_bits(13, 20); /* large page */ - context->rsvd_bits_mask[1][0] = ~0ull; + context->rsvd_bits_mask[1][0] = 0ull; break; } }