| Message ID | 1245850625-1807-1-git-send-email-andre.przywara@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 06/24/2009 04:37 PM, Andre Przywara wrote: > Linux guests will try to enable access to the extended PCI config space > via the I/O ports 0xCF8/0xCFC on AMD Fam10h CPU. Since we (currently?) > don't use ECS, simply ignore write and read attempts. > Applied, thanks.
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index a148f4c..c717037 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -804,6 +804,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) return 1; } break; + case MSR_AMD64_NB_CFG: + break; case MSR_IA32_DEBUGCTLMSR: if (!data) { /* We support the non-activated case already */ @@ -1002,6 +1004,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_P6_EVNTSEL1: case MSR_K7_EVNTSEL0: case MSR_K8_INT_PENDING_MSG: + case MSR_AMD64_NB_CFG: data = 0; break; case MSR_MTRRcap:
Linux guests will try to enable access to the extended PCI config space via the I/O ports 0xCF8/0xCFC on AMD Fam10h CPU. Since we (currently?) don't use ECS, simply ignore write and read attempts. Signed-off-by: Andre Przywara <andre.przywara@amd.com> --- arch/x86/kvm/x86.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)