From patchwork Wed Jun 24 13:37:05 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 32191 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5ODYXr6008694 for ; Wed, 24 Jun 2009 13:34:34 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760307AbZFXNdj (ORCPT ); Wed, 24 Jun 2009 09:33:39 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1760279AbZFXNdi (ORCPT ); Wed, 24 Jun 2009 09:33:38 -0400 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:58316 "EHLO TX2EHSOBE006.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760292AbZFXNdh (ORCPT ); Wed, 24 Jun 2009 09:33:37 -0400 Received: from mail67-tx2-R.bigfish.com (10.9.14.243) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 8.1.340.0; Wed, 24 Jun 2009 13:33:40 +0000 Received: from mail67-tx2 (localhost.localdomain [127.0.0.1]) by mail67-tx2-R.bigfish.com (Postfix) with ESMTP id 1A2AFE80D0; Wed, 24 Jun 2009 13:33:40 +0000 (UTC) X-SpamScore: 3 X-BigFish: VPS3(zzzz1202hzzz32i17ch43j65h) X-Spam-TCS-SCL: 4:0 Received: by mail67-tx2 (MessageSwitch) id 1245850418795894_5530; Wed, 24 Jun 2009 13:33:38 +0000 (UCT) Received: from ausb3extmailp01.amd.com (unknown [163.181.251.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail67-tx2.bigfish.com (Postfix) with ESMTP id 7BE1213C0052; Wed, 24 Jun 2009 13:33:38 +0000 (UTC) Received: from ausb3twp02.amd.com ([163.181.250.38]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n5ODXRqj022778; Wed, 24 Jun 2009 08:33:32 -0500 X-WSS-ID: 0KLQWBO-02-56D-01 Received: from sausexbh1.amd.com (sausexbh1.amd.com [163.181.22.101]) by ausb3twp02.amd.com (Tumbleweed MailGate 3.5.1) with ESMTP id 2BA4F123402D; Wed, 24 Jun 2009 08:33:24 -0500 (CDT) Received: from SAUSEXMB3.amd.com ([163.181.22.202]) by sausexbh1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Jun 2009 08:33:32 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by SAUSEXMB3.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Jun 2009 08:33:31 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Jun 2009 15:33:13 +0200 From: Andre Przywara To: avi@redhat.com CC: kvm@vger.kernel.org, Andre Przywara Subject: [PATCH 3/4] ignore PCI ECS I/O enablement Date: Wed, 24 Jun 2009 15:37:05 +0200 Message-ID: <1245850625-1807-1-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <4A420E86.4040002@redhat.com> References: <4A420E86.4040002@redhat.com> X-OriginalArrivalTime: 24 Jun 2009 13:33:13.0250 (UTC) FILETIME=[5292D820:01C9F4D0] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Linux guests will try to enable access to the extended PCI config space via the I/O ports 0xCF8/0xCFC on AMD Fam10h CPU. Since we (currently?) don't use ECS, simply ignore write and read attempts. Signed-off-by: Andre Przywara --- arch/x86/kvm/x86.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index a148f4c..c717037 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -804,6 +804,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) return 1; } break; + case MSR_AMD64_NB_CFG: + break; case MSR_IA32_DEBUGCTLMSR: if (!data) { /* We support the non-activated case already */ @@ -1002,6 +1004,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_P6_EVNTSEL1: case MSR_K7_EVNTSEL0: case MSR_K8_INT_PENDING_MSG: + case MSR_AMD64_NB_CFG: data = 0; break; case MSR_MTRRcap: