From patchwork Sun Jun 28 12:15:29 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gleb Natapov X-Patchwork-Id: 32712 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5SCFhHi026850 for ; Sun, 28 Jun 2009 12:15:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751714AbZF1MPg (ORCPT ); Sun, 28 Jun 2009 08:15:36 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751409AbZF1MPc (ORCPT ); Sun, 28 Jun 2009 08:15:32 -0400 Received: from mx2.redhat.com ([66.187.237.31]:60398 "EHLO mx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751018AbZF1MPb (ORCPT ); Sun, 28 Jun 2009 08:15:31 -0400 Received: from int-mx2.corp.redhat.com (int-mx2.corp.redhat.com [172.16.27.26]) by mx2.redhat.com (8.13.8/8.13.8) with ESMTP id n5SCFXxR007718 for ; Sun, 28 Jun 2009 08:15:33 -0400 Received: from ns3.rdu.redhat.com (ns3.rdu.redhat.com [10.11.255.199]) by int-mx2.corp.redhat.com (8.13.1/8.13.1) with ESMTP id n5SCFWFt016716; Sun, 28 Jun 2009 08:15:33 -0400 Received: from dhcp-1-237.tlv.redhat.com (dhcp-1-237.tlv.redhat.com [10.35.1.237]) by ns3.rdu.redhat.com (8.13.8/8.13.8) with ESMTP id n5SCFVBU016819; Sun, 28 Jun 2009 08:15:32 -0400 Received: by dhcp-1-237.tlv.redhat.com (Postfix, from userid 13519) id 6F6DF18D47A; Sun, 28 Jun 2009 15:15:31 +0300 (IDT) From: Gleb Natapov To: avi@redhat.com Cc: kvm@vger.kernel.org Subject: [PATCH 1/3 v2] Add Directed EOI support to APIC emulation Date: Sun, 28 Jun 2009 15:15:29 +0300 Message-Id: <1246191331-31085-2-git-send-email-gleb@redhat.com> In-Reply-To: <1246191331-31085-1-git-send-email-gleb@redhat.com> References: <1246191331-31085-1-git-send-email-gleb@redhat.com> X-Scanned-By: MIMEDefang 2.58 on 172.16.27.26 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Directed EOI is specified by x2APIC, but is available even when lapic is in xAPIC mode. Signed-off-by: Gleb Natapov --- arch/x86/include/asm/apicdef.h | 2 ++ arch/x86/kvm/lapic.c | 13 ++++++++----- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index 7ddb36a..74ca38f 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h @@ -14,6 +14,7 @@ #define APIC_LVR 0x30 #define APIC_LVR_MASK 0xFF00FF +#define APIC_LVR_DIRECTED_EOI (1 << 24) #define GET_APIC_VERSION(x) ((x) & 0xFFu) #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) #ifdef CONFIG_X86_32 @@ -40,6 +41,7 @@ #define APIC_DFR_CLUSTER 0x0FFFFFFFul #define APIC_DFR_FLAT 0xFFFFFFFFul #define APIC_SPIV 0xF0 +#define APIC_SPIV_DIRECTED_EOI (1 << 12) #define APIC_SPIV_FOCUS_DISABLED (1 << 9) #define APIC_SPIV_APIC_ENABLED (1 << 8) #define APIC_ISR 0x100 diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 2e02865..db0c6ae 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -54,7 +54,8 @@ #define APIC_LVT_NUM 6 /* 14 is the version for Xeon and Pentium 8.4.8*/ -#define APIC_VERSION (0x14UL | ((APIC_LVT_NUM - 1) << 16)) +#define APIC_VERSION (0x14UL | ((APIC_LVT_NUM - 1) << 16) | \ + APIC_LVR_DIRECTED_EOI) #define LAPIC_MMIO_LENGTH (1 << 12) /* followed define is not in apicdef.h */ #define APIC_SHORT_MASK 0xc0000 @@ -442,9 +443,11 @@ static void apic_set_eoi(struct kvm_lapic *apic) trigger_mode = IOAPIC_LEVEL_TRIG; else trigger_mode = IOAPIC_EDGE_TRIG; - mutex_lock(&apic->vcpu->kvm->irq_lock); - kvm_ioapic_update_eoi(apic->vcpu->kvm, vector, trigger_mode); - mutex_unlock(&apic->vcpu->kvm->irq_lock); + if (!(apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)) { + mutex_lock(&apic->vcpu->kvm->irq_lock); + kvm_ioapic_update_eoi(apic->vcpu->kvm, vector, trigger_mode); + mutex_unlock(&apic->vcpu->kvm->irq_lock); + } } static void apic_send_ipi(struct kvm_lapic *apic) @@ -683,7 +686,7 @@ static void apic_mmio_write(struct kvm_io_device *this, break; case APIC_SPIV: - apic_set_reg(apic, APIC_SPIV, val & 0x3ff); + apic_set_reg(apic, APIC_SPIV, val & 0xfff); if (!(val & APIC_SPIV_APIC_ENABLED)) { int i; u32 lvt_val;