@@ -834,6 +834,12 @@ static int get_msr_entry(struct kvm_msr_entry *entry, CPUState *env)
case MSR_VM_HSAVE_PA:
env->vm_hsave = entry->data;
break;
+ case MSR_KVM_SYSTEM_TIME:
+ env->system_time_msr = entry->data;
+ break;
+ case MSR_KVM_WALL_CLOCK:
+ env->wall_clock_msr = entry->data;
+ break;
default:
printf("Warning unknown msr index 0x%x\n", entry->index);
return 1;
@@ -842,9 +848,9 @@ static int get_msr_entry(struct kvm_msr_entry *entry, CPUState *env)
}
#ifdef TARGET_X86_64
-#define MSR_COUNT 10
+#define MSR_COUNT 12
#else
-#define MSR_COUNT 6
+#define MSR_COUNT 8
#endif
static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
@@ -1002,6 +1008,8 @@ void kvm_arch_load_regs(CPUState *env)
set_msr_entry(&msrs[n++], MSR_LSTAR , env->lstar);
}
#endif
+ set_msr_entry(&msrs[n++], MSR_KVM_SYSTEM_TIME, env->system_time_msr);
+ set_msr_entry(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr);
rc = kvm_set_msrs(env->kvm_cpu_state.vcpu_ctx, msrs, n);
if (rc == -1)
@@ -1181,6 +1189,9 @@ void kvm_arch_save_regs(CPUState *env)
msrs[n++].index = MSR_LSTAR;
}
#endif
+ msrs[n++].index = MSR_KVM_SYSTEM_TIME;
+ msrs[n++].index = MSR_KVM_WALL_CLOCK;
+
rc = kvm_get_msrs(env->kvm_cpu_state.vcpu_ctx, msrs, n);
if (rc == -1) {
perror("kvm_get_msrs FAILED");
@@ -667,6 +667,8 @@ typedef struct CPUX86State {
target_ulong fmask;
target_ulong kernelgsbase;
#endif
+ uint64_t system_time_msr;
+ uint64_t wall_clock_msr;
uint64_t tsc;
@@ -886,7 +888,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define cpu_signal_handler cpu_x86_signal_handler
#define cpu_list x86_cpu_list
-#define CPU_SAVE_VERSION 11
+#define CPU_SAVE_VERSION 12
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
@@ -479,6 +479,9 @@ const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
/* rdtscp */
VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
+ /* KVM pvclock msr */
+ VMSTATE_UINT64_V(system_time_msr, CPUState, 12),
+ VMSTATE_UINT64_V(wall_clock_msr, CPUState, 12),
VMSTATE_END_OF_LIST()
}
};