From patchwork Fri Feb 26 03:20:57 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Ying" X-Patchwork-Id: 82246 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1Q3L3Rw015711 for ; Fri, 26 Feb 2010 03:21:03 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935095Ab0BZDVA (ORCPT ); Thu, 25 Feb 2010 22:21:00 -0500 Received: from mga14.intel.com ([143.182.124.37]:4353 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935082Ab0BZDU7 (ORCPT ); Thu, 25 Feb 2010 22:20:59 -0500 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 25 Feb 2010 19:20:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.49,544,1262592000"; d="scan'208";a="248328578" Received: from yhuang-dev.sh.intel.com (HELO [10.239.13.129]) ([10.239.13.129]) by azsmga001.ch.intel.com with ESMTP; 25 Feb 2010 19:20:58 -0800 Subject: Add savevm/loadvm support for MCE From: Huang Ying To: Avi Kivity , Anthony Liguori , Andi Kleen Cc: kvm@vger.kernel.org Date: Fri, 26 Feb 2010 11:20:57 +0800 Message-ID: <1267154457.32397.254.camel@yhuang-dev.sh.intel.com> Mime-Version: 1.0 X-Mailer: Evolution 2.28.2 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 26 Feb 2010 03:21:03 +0000 (UTC) --- a/qemu-kvm-x86.c +++ b/qemu-kvm-x86.c @@ -803,6 +803,27 @@ static void get_seg(SegmentCache *lhs, c | (rhs->avl * DESC_AVL_MASK); } +static void kvm_load_mce_regs(CPUState *env) +{ +#ifdef KVM_CAP_MCE + struct kvm_msr_entry msrs[100]; + int rc, n, i; + + if (!env->mcg_cap) + return; + + n = 0; + set_msr_entry(&msrs[n++], MSR_MCG_STATUS, env->mcg_status); + set_msr_entry(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl); + for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) + set_msr_entry(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]); + + rc = kvm_set_msrs(env, msrs, n); + if (rc == -1) + perror("kvm_set_msrs FAILED"); +#endif +} + void kvm_arch_load_regs(CPUState *env) { struct kvm_regs regs; @@ -922,6 +943,8 @@ void kvm_arch_load_regs(CPUState *env) if (rc == -1) perror("kvm_set_msrs FAILED"); + kvm_load_mce_regs(env); + /* * Kernels before 2.6.33 (which correlates with !kvm_has_vcpu_events()) * overwrote flags.TF injected via SET_GUEST_DEBUG while updating GP regs. @@ -991,6 +1014,33 @@ void kvm_arch_load_mpstate(CPUState *env #endif } +static void kvm_save_mce_regs(CPUState *env) +{ +#ifdef KVM_CAP_MCE + struct kvm_msr_entry msrs[100]; + int rc, n, i; + + if (!env->mcg_cap) + return; + + msrs[0].index = MSR_MCG_STATUS; + msrs[1].index = MSR_MCG_CTL; + n = (env->mcg_cap & 0xff) * 4; + for (i = 0; i < n; i++) + msrs[2 + i].index = MSR_MC0_CTL + i; + + rc = kvm_get_msrs(env, msrs, n + 2); + if (rc == -1) + perror("kvm_set_msrs FAILED"); + else { + env->mcg_status = msrs[0].data; + env->mcg_ctl = msrs[1].data; + for (i = 0; i < n; i++) + env->mce_banks[i] = msrs[2 + i].data; + } +#endif +} + void kvm_arch_save_regs(CPUState *env) { struct kvm_regs regs; @@ -1148,6 +1198,7 @@ void kvm_arch_save_regs(CPUState *env) } } kvm_arch_save_mpstate(env); + kvm_save_mce_regs(env); } static void do_cpuid_ent(struct kvm_cpuid_entry2 *e, uint32_t function, @@ -1385,6 +1436,9 @@ void kvm_arch_push_nmi(void *opaque) void kvm_arch_cpu_reset(CPUState *env) { kvm_arch_reset_vcpu(env); + /* MCE registers except MCG_STATUS should be unchanged across reset */ + kvm_save_mce_regs(env); + env->mcg_status = 0; kvm_arch_load_regs(env); kvm_put_vcpu_events(env); if (!cpu_is_bsp(env)) {