@@ -213,7 +213,7 @@ obj-i386-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
obj-i386-y += device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o
obj-i386-y += ne2000-isa.o debugcon.o multiboot.o
-obj-i386-$(CONFIG_KVM) += ioapic-kvm.o
+obj-i386-$(CONFIG_KVM) += ioapic-kvm.o i8259-kvm.o
# shared objects
obj-ppc-y = ppc.o ide/core.o ide/qdev.o ide/isa.o ide/pci.o ide/macio.o
new file mode 100644
@@ -0,0 +1,112 @@
+#include "hw.h"
+#include "pc.h"
+#include "isa.h"
+#include "monitor.h"
+#include "qemu-timer.h"
+#include "kvm.h"
+
+static void kvm_i8259_set_irq(void *opaque, int irq, int level)
+{
+ int pic_ret;
+
+ if (kvm_set_irq(irq, level, &pic_ret)) {
+ if (pic_ret != 0)
+ /* In theory, we should not be using any apic state, but we need
+ * to warn devices such as the rtc about state of delivery. Since this
+ * one is just a marker, it is no big deal */
+ apic_set_irq_delivered();
+ return;
+ }
+}
+
+static void kvm_pic_reset(void *opaque)
+{
+ struct kvm_pic_state *s = opaque;
+ struct kvm_irqchip *chip;
+
+ s->last_irr = 0;
+ s->irr = 0;
+ s->imr = 0;
+ s->isr = 0;
+ s->priority_add = 0;
+ s->irq_base = 0;
+ s->read_reg_select = 0;
+ s->poll = 0;
+ s->special_mask = 0;
+ s->init_state = 0;
+ s->auto_eoi = 0;
+ s->rotate_on_auto_eoi = 0;
+ s->special_fully_nested_mode = 0;
+ s->init4 = 0;
+
+ chip = container_of(s, struct kvm_irqchip, chip.pic);
+ kvm_set_irqchip(chip);
+}
+
+static void pic_pre_save(void *opaque)
+{
+ struct kvm_pic_state *s = opaque;
+ struct kvm_irqchip *chip;
+
+ chip = container_of(s, struct kvm_irqchip, chip.pic);
+
+ kvm_get_irqchip(chip);
+}
+
+static int pic_post_load(void *opaque, int version_id)
+{
+ struct kvm_pic_state *s = opaque;
+ struct kvm_irqchip *chip;
+
+ chip = container_of(s, struct kvm_irqchip, chip.pic);
+
+ return kvm_set_irqchip(chip);
+}
+
+static const VMStateDescription vmstate_kvm_pic = {
+ .name = "i8259-kvm",
+ .version_id = 1,
+ .pre_save = pic_pre_save,
+ .post_load = pic_post_load,
+ .minimum_version_id = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT8(last_irr, struct kvm_pic_state),
+ VMSTATE_UINT8(irr, struct kvm_pic_state),
+ VMSTATE_UINT8(imr, struct kvm_pic_state),
+ VMSTATE_UINT8(isr, struct kvm_pic_state),
+ VMSTATE_UINT8(priority_add, struct kvm_pic_state),
+ VMSTATE_UINT8(irq_base, struct kvm_pic_state),
+ VMSTATE_UINT8(read_reg_select, struct kvm_pic_state),
+ VMSTATE_UINT8(poll, struct kvm_pic_state),
+ VMSTATE_UINT8(special_mask, struct kvm_pic_state),
+ VMSTATE_UINT8(init_state, struct kvm_pic_state),
+ VMSTATE_UINT8(auto_eoi, struct kvm_pic_state),
+ VMSTATE_UINT8(rotate_on_auto_eoi, struct kvm_pic_state),
+ VMSTATE_UINT8(special_fully_nested_mode, struct kvm_pic_state),
+ VMSTATE_UINT8(init4, struct kvm_pic_state),
+ VMSTATE_UINT8(elcr, struct kvm_pic_state),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void kvm_pic_init1(int io_addr, struct kvm_pic_state *s)
+{
+ vmstate_register(io_addr, &vmstate_kvm_pic, s);
+ qemu_register_reset(kvm_pic_reset, s);
+}
+
+qemu_irq *kvm_i8259_init(qemu_irq parent_irq)
+{
+ struct kvm_irqchip *master, *slave;
+
+ master = qemu_mallocz(sizeof(*master));
+ slave = qemu_mallocz(sizeof(*slave));
+
+ master->chip_id = KVM_IRQCHIP_PIC_MASTER;
+ slave->chip_id = KVM_IRQCHIP_PIC_SLAVE;
+
+ kvm_pic_init1(0x20, &master->chip.pic);
+ kvm_pic_init1(0xa0, &slave->chip.pic);
+
+ return qemu_allocate_irqs(kvm_i8259_set_irq, master, 16);
+}
@@ -903,8 +903,14 @@ static void pc_init1(ram_addr_t ram_size,
}
cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
- i8259 = i8259_init(cpu_irq[0]);
isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
+
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ i8259 = kvm_i8259_init(cpu_irq[0]);
+ } else {
+ i8259 = i8259_init(cpu_irq[0]);
+ }
+
isa_irq_state->i8259 = i8259;
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
@@ -34,6 +34,7 @@ uint32_t pic_intack_read(PicState2 *s);
void pic_info(Monitor *mon);
void irq_info(Monitor *mon);
+qemu_irq *kvm_i8259_init(qemu_irq parent_irq);
/* APIC */
typedef struct IOAPICState IOAPICState;
void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
@@ -586,6 +586,11 @@ int kvm_get_irqchip(struct kvm_irqchip *chip)
return kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, chip);
}
+int kvm_set_irq(int irq, int level, int *status)
+{
+ return kvm_arch_set_irq(kvm_state, irq, level, status);
+}
+
int kvm_init(int smp_cpus)
{
static const char upgrade_note[] =
@@ -64,6 +64,8 @@ int kvm_irqchip_in_kernel(void);
int kvm_set_irqchip(struct kvm_irqchip *chip);
int kvm_get_irqchip(struct kvm_irqchip *chip);
+int kvm_set_irq(int irq, int level, int *status);
+
/* internal API */
struct KVMState;
@@ -93,6 +95,8 @@ int kvm_arch_init_vcpu(CPUState *env);
void kvm_arch_reset_vcpu(CPUState *env);
+int kvm_arch_set_irq(KVMState *s, int irq, int level, int *status);
+
struct kvm_guest_debug;
struct kvm_debug_exit_arch;
@@ -1157,3 +1157,27 @@ void kvm_arch_update_guest_debug(CPUState *env, struct kvm_guest_debug *dbg)
}
}
#endif /* KVM_CAP_SET_GUEST_DEBUG */
+
+int kvm_arch_set_irq(KVMState *s, int irq, int level, int *status)
+{
+ struct kvm_irq_level event;
+ int r;
+
+ if (!kvm_irqchip_in_kernel()) {
+ return 0;
+ }
+
+ event.level = level;
+ event.irq = irq;
+
+ r = kvm_vm_ioctl(s, KVM_IRQ_LINE_STATUS, &event);
+
+ if (r < 0)
+ return 0;
+
+ if (status) {
+ *status = event.status;
+ }
+
+ return 1;
+}
@@ -73,6 +73,11 @@ void kvm_arch_reset_vcpu(CPUState *env)
{
}
+int kvm_arch_set_irq(KVMState *s, int irq, int level, int *status)
+{
+ return -ENOSYS;
+}
+
int kvm_arch_put_registers(CPUState *env)
{
struct kvm_regs regs;