From patchwork Tue Jun 8 17:55:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Lalancette X-Patchwork-Id: 105002 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o58HvPje004985 for ; Tue, 8 Jun 2010 17:57:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756114Ab0FHR5W (ORCPT ); Tue, 8 Jun 2010 13:57:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54592 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756063Ab0FHR5U (ORCPT ); Tue, 8 Jun 2010 13:57:20 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o58HvKHQ015454 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 8 Jun 2010 13:57:20 -0400 Received: from localhost.localdomain (dhcp-100-19-171.bos.redhat.com [10.16.19.171]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o58HvI7r027074; Tue, 8 Jun 2010 13:57:19 -0400 From: Chris Lalancette To: kvm@vger.kernel.org Cc: avi@redhat.com, mtosatti@redhat.com, Chris Lalancette Subject: [RFC][PATCH 2/3] Allow any LAPIC to accept PIC interrupts. Date: Tue, 8 Jun 2010 13:55:02 -0400 Message-Id: <1276019703-18136-3-git-send-email-clalance@redhat.com> In-Reply-To: <1276019703-18136-1-git-send-email-clalance@redhat.com> References: <1276019703-18136-1-git-send-email-clalance@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Tue, 08 Jun 2010 17:57:25 +0000 (UTC) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index d8258a0..ee0f76c 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1107,13 +1107,11 @@ int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0); int r = 0; - if (kvm_vcpu_is_bsp(vcpu)) { - if (!apic_hw_enabled(vcpu->arch.apic)) - r = 1; - if ((lvt0 & APIC_LVT_MASKED) == 0 && - GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) - r = 1; - } + if (!apic_hw_enabled(vcpu->arch.apic)) + r = 1; + if ((lvt0 & APIC_LVT_MASKED) == 0 && + GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) + r = 1; return r; }