From patchwork Tue Sep 28 09:44:12 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sheng Yang X-Patchwork-Id: 214352 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8S9iPYt008701 for ; Tue, 28 Sep 2010 09:44:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760158Ab0I1JoX (ORCPT ); Tue, 28 Sep 2010 05:44:23 -0400 Received: from mga11.intel.com ([192.55.52.93]:27192 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758764Ab0I1JoT (ORCPT ); Tue, 28 Sep 2010 05:44:19 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 28 Sep 2010 02:44:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.57,246,1283756400"; d="scan'208";a="611130744" Received: from syang10-desktop.sh.intel.com (HELO syang10-desktop) ([10.239.13.14]) by fmsmga002.fm.intel.com with ESMTP; 28 Sep 2010 02:44:18 -0700 Received: from yasker by syang10-desktop with local (Exim 4.71) (envelope-from ) id 1P0WjN-0006UL-E1; Tue, 28 Sep 2010 17:44:13 +0800 From: Sheng Yang To: Avi Kivity , Marcelo Tosatti Cc: kvm@vger.kernel.org, Sheng Yang Subject: [PATCH 3/3] qemu-kvm: device assignment: emulate MSI-X mask bits Date: Tue, 28 Sep 2010 17:44:12 +0800 Message-Id: <1285667052-24907-4-git-send-email-sheng@linux.intel.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1285667052-24907-1-git-send-email-sheng@linux.intel.com> References: <1285667052-24907-1-git-send-email-sheng@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 28 Sep 2010 09:44:26 +0000 (UTC) diff --git a/hw/device-assignment.c b/hw/device-assignment.c index 4edae52..564c5ab 100644 --- a/hw/device-assignment.c +++ b/hw/device-assignment.c @@ -1146,6 +1146,7 @@ static int get_msix_entries_max_nr(AssignedDevice *adev) return entries_max_nr; } +#define MSIX_VECTOR_MASK 0x1 static int get_msix_valid_entries_nr(AssignedDevice *adev, uint16_t entries_max_nr) { @@ -1159,7 +1160,11 @@ static int get_msix_valid_entries_nr(AssignedDevice *adev, memcpy(&msg_ctrl, va + i * 16 + 12, 4); memcpy(&msg_data, va + i * 16 + 8, 4); /* Ignore unused entry even it's unmasked */ +#ifdef KVM_CAP_DEVICE_MSIX_MASK + if (msg_data == 0 || (msg_ctrl & MSIX_VECTOR_MASK)) +#else if (msg_data == 0) +#endif continue; entries_nr ++; } @@ -1188,6 +1193,8 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev, } free_dev_irq_entries(adev); + memset(pci_dev->msix_entry_used, 0, KVM_MAX_MSIX_PER_DEV * + sizeof(*pci_dev->msix_entry_used)); adev->irq_entries_nr = entries_nr; adev->entry = calloc(entries_nr, sizeof(struct kvm_irq_routing_entry)); if (!adev->entry) { @@ -1223,6 +1230,7 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev, msix_entry.gsi = adev->entry[entries_nr].gsi; msix_entry.entry = i; + pci_dev->msix_entry_used[i] = 1; r = kvm_assign_set_msix_entry(kvm_context, &msix_entry); if (r) { fprintf(stderr, "fail to set MSI-X entry! %s\n", strerror(-r)); @@ -1266,6 +1274,8 @@ static void assigned_dev_update_msix(PCIDevice *pci_dev, int enable_msix) perror("assigned_dev_update_msix: deassign irq"); assigned_dev->irq_requested_type = 0; + memset(pci_dev->msix_entry_used, 0, KVM_MAX_MSIX_PER_DEV * + sizeof(*pci_dev->msix_entry_used)); } entries_max_nr = get_msix_entries_max_nr(assigned_dev); @@ -1273,10 +1283,16 @@ static void assigned_dev_update_msix(PCIDevice *pci_dev, int enable_msix) fprintf(stderr, "assigned_dev_update_msix: MSI-X entries_max_nr == 0"); return; } + /* + * Guest may try to enable MSI-X before setting MSI-X entry done, so + * let's wait until guest unmask the entries. + */ entries_nr = get_msix_valid_entries_nr(assigned_dev, entries_max_nr); if (entries_nr == 0) { +#ifndef KVM_CAP_DEVICE_MSIX_MASK if (enable_msix) fprintf(stderr, "MSI-X entry number is zero!\n"); +#endif return; } if (enable_msix) { @@ -1320,7 +1336,8 @@ static void assigned_device_pci_cap_write_config(PCIDevice *pci_dev, uint32_t ad if (address <= ctrl_pos && address + len > ctrl_pos) { ctrl_pos--; /* control is word long */ ctrl_word = (uint16_t *)(pci_dev->config + ctrl_pos); - assigned_dev_update_msix(pci_dev, (*ctrl_word & PCI_MSIX_ENABLE)); + assigned_dev_update_msix(pci_dev, + (*ctrl_word & PCI_MSIX_ENABLE) && !(*ctrl_word & PCI_MSIX_MASK)); } pos += PCI_CAPABILITY_CONFIG_MSIX_LENGTH; } @@ -1412,6 +1429,104 @@ static uint32_t msix_mmio_readw(void *opaque, target_phys_addr_t addr) (8 * (addr & 3))) & 0xffff; } +#ifdef KVM_CAP_DEVICE_MSIX_MASK +static void msix_mmio_access_mask_bit(AssignedDevice *adev, int index) +{ + void *page = adev->msix_table_page; + uint32_t msg_ctrl, msg_data, msg_upper_addr, msg_addr; + struct kvm_assigned_msix_entry msix_entry; + int r = 0, pos, ctrl_word, entry_idx, entries_max_nr; + struct kvm_irq_routing_entry old_entry = {}; + + memcpy(&msg_addr, (char *)page + index * 16, 4); + memcpy(&msg_upper_addr, (char *)page + index * 16 + 4, 4); + memcpy(&msg_data, (char *)page + index * 16 + 8, 4); + memcpy(&msg_ctrl, (char *)page + index * 16 + 12, 4); + DEBUG("Access mask bit: MSI-X entries index %d: " + "msg_addr 0x%x, msg_upper_addr 0x%x, msg_data 0x%x, vec_ctl 0x%x\n", + index, msg_addr, msg_upper_addr, msg_data, msg_ctrl); + + if (adev->cap.available & ASSIGNED_DEVICE_CAP_MSI) + pos = adev->dev.cap.start + PCI_CAPABILITY_CONFIG_MSI_LENGTH; + else + pos = adev->dev.cap.start; + + ctrl_word = *(uint16_t *)(adev->dev.config + pos + 2); + + if (!((ctrl_word & PCI_MSIX_ENABLE) && !(ctrl_word & PCI_MSIX_MASK))) + return; + + if (!adev->dev.msix_entry_used[index] && (msg_ctrl & MSIX_VECTOR_MASK) == 0) { + DEBUG("Try to modify unenabled MSI-X entry %d's mask. " + "Reenable MSI-X.\n", + index); + assigned_dev_update_msix(&adev->dev, 1); + return; + } + + /* find the correlated index of adev->entry */ + entries_max_nr = get_msix_entries_max_nr(adev); + entry_idx = 0; + while (entry_idx < entries_max_nr) + if (adev->dev.msix_entry_used[index]) { + if (entry_idx == index) + break; + entry_idx ++; + } + if (entry_idx >= entries_max_nr) { + fprintf(stderr, "msix_mmio_access_mask_bit: Entry idx exceed limit!\n"); + return; + } + + msix_entry.assigned_dev_id = calc_assigned_dev_id(adev->h_segnr, + adev->h_busnr, + (uint8_t)adev->h_devfn); + msix_entry.gsi = adev->entry[entry_idx].gsi; + msix_entry.entry = index; + if (msg_ctrl & MSIX_VECTOR_MASK) + msix_entry.flags = KVM_MSIX_FLAG_MASK; + else + msix_entry.flags = 0; + DEBUG("set MSI-X index %d, esi 0x%x, mask %d\n", + index, msix_entry.gsi, msix_entry.flags); + r = kvm_assign_set_msix_entry(kvm_context, &msix_entry); + if (r) { + perror("msix_mmio_access_mask_bit: " + "fail to set MSI-X entry!"); + return; + } + + if (msix_entry.flags == 0) { + old_entry.gsi = adev->entry[entry_idx].gsi; + old_entry.type = KVM_IRQ_ROUTING_MSI; + old_entry.flags = 0; + old_entry.u.msi.address_lo = adev->entry[entry_idx].u.msi.address_lo; + old_entry.u.msi.address_hi = adev->entry[entry_idx].u.msi.address_hi; + old_entry.u.msi.data = adev->entry[entry_idx].u.msi.data; + adev->entry[entry_idx].u.msi.address_lo = msg_addr; + adev->entry[entry_idx].u.msi.address_hi = msg_upper_addr; + adev->entry[entry_idx].u.msi.data = msg_data; + if (memcmp(&adev->entry[entry_idx].u.msi, &old_entry.u.msi, + sizeof old_entry.u.msi)) { + int r; + r = kvm_update_routing_entry(kvm_context, &old_entry, + &adev->entry[entry_idx]); + if (r) { + perror("msix_mmio_access_mask_bit: " + "kvm_update_routing_entry failed\n"); + return; + } + r = kvm_commit_irq_routes(kvm_context); + if (r) { + perror("msix_mmio_access_mask_bit: " + "kvm_commit_irq_routes failed\n"); + return; + } + } + } +} +#endif + static void msix_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { @@ -1422,6 +1537,12 @@ static void msix_mmio_writel(void *opaque, DEBUG("write to MSI-X entry table mmio offset 0x%lx, val 0x%x\n", addr, val); memcpy((void *)((char *)page + offset), &val, 4); + +#ifdef KVM_CAP_DEVICE_MSIX_MASK + /* Check if mask bit is being accessed */ + if (offset % 16 == 12) + msix_mmio_access_mask_bit(adev, offset / 16); +#endif } static void msix_mmio_writew(void *opaque, @@ -1459,6 +1580,8 @@ static int assigned_dev_register_msix_mmio(AssignedDevice *dev) memset(dev->msix_table_page, 0, 0x1000); dev->mmio_index = cpu_register_io_memory( msix_mmio_read, msix_mmio_write, dev); + dev->dev.msix_entry_used = qemu_mallocz(KVM_MAX_MSIX_PER_DEV * + sizeof *dev->dev.msix_entry_used); return 0; } @@ -1475,6 +1598,8 @@ static void assigned_dev_unregister_msix_mmio(AssignedDevice *dev) strerror(errno)); } dev->msix_table_page = NULL; + free(dev->dev.msix_entry_used); + dev->dev.msix_entry_used = NULL; } static int assigned_initfn(struct PCIDevice *pci_dev)