From patchwork Wed Feb 2 12:16:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Glauber Costa X-Patchwork-Id: 526681 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p12CHuVF021730 for ; Wed, 2 Feb 2011 12:17:56 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754000Ab1BBMRx (ORCPT ); Wed, 2 Feb 2011 07:17:53 -0500 Received: from mx1.redhat.com ([209.132.183.28]:38035 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753617Ab1BBMRw (ORCPT ); Wed, 2 Feb 2011 07:17:52 -0500 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id p12CHoO1028965 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 2 Feb 2011 07:17:51 -0500 Received: from virtlab1.virt.bos.redhat.com (virtlab1.virt.bos.redhat.com [10.16.72.21]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p12CHnoU007895; Wed, 2 Feb 2011 07:17:49 -0500 From: Glauber Costa To: kvm@vger.kernel.org Cc: qemu-devel@nongnu.org, avi@redhat.com, mtosatti@redhat.com, Jan Kiszka Subject: [PATCH v2] make tsc stable over migration and machine start Date: Wed, 2 Feb 2011 07:16:20 -0500 Message-Id: <1296648980-28883-1-git-send-email-glommer@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 02 Feb 2011 12:17:57 +0000 (UTC) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 6d619e8..6bb2e87 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -732,6 +732,7 @@ typedef struct CPUX86State { uint32_t sipi_vector; uint32_t cpuid_kvm_features; uint32_t cpuid_svm_features; + bool tsc_valid; /* in order to simplify APIC support, we leave this pointer to the user */ diff --git a/target-i386/kvm.c b/target-i386/kvm.c index ecb8405..9cc198a 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -302,6 +302,15 @@ void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status, static int _kvm_arch_init_vcpu(CPUState *env); +static void cpu_update_state(void *opaque, int running, int reason) +{ + CPUState *env = opaque; + + if (running) { + env->tsc_valid = false; + } +} + int kvm_arch_init_vcpu(CPUState *env) { int r; @@ -444,6 +453,8 @@ int kvm_arch_init_vcpu(CPUState *env) } #endif + qemu_add_vm_change_state_handler(cpu_update_state, env); + return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data); } @@ -1093,7 +1104,12 @@ static int kvm_get_msrs(CPUState *env) msrs[n++].index = MSR_STAR; if (kvm_has_msr_hsave_pa(env)) msrs[n++].index = MSR_VM_HSAVE_PA; - msrs[n++].index = MSR_IA32_TSC; + + if (!env->tsc_valid) { + msrs[n++].index = MSR_IA32_TSC; + env->tsc_valid = !vm_running; + } + #ifdef TARGET_X86_64 if (lm_capable_kernel) { msrs[n++].index = MSR_CSTAR;