From patchwork Fri Mar 25 09:29:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 661361 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2P9TYmq015335 for ; Fri, 25 Mar 2011 09:29:48 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933855Ab1CYJ3d (ORCPT ); Fri, 25 Mar 2011 05:29:33 -0400 Received: from ch1outboundpool.messaging.microsoft.com ([216.32.181.184]:40404 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933827Ab1CYJ3b (ORCPT ); Fri, 25 Mar 2011 05:29:31 -0400 Received: from mail53-ch1-R.bigfish.com (216.32.181.169) by CH1EHSOBE008.bigfish.com (10.43.70.58) with Microsoft SMTP Server id 14.1.225.8; Fri, 25 Mar 2011 09:29:30 +0000 Received: from mail53-ch1 (localhost.localdomain [127.0.0.1]) by mail53-ch1-R.bigfish.com (Postfix) with ESMTP id 33B5EA042C; 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Fri, 25 Mar 2011 04:29:22 -0500 (CDT) Received: from sausexhtp02.amd.com (163.181.3.152) by sausexedgep01.amd.com (163.181.36.54) with Microsoft SMTP Server (TLS) id 8.3.106.1; Fri, 25 Mar 2011 04:36:51 -0500 Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp02.amd.com (163.181.3.152) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 25 Mar 2011 04:29:26 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.3.83.0; Fri, 25 Mar 2011 05:29:25 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id 7944849C59B; Fri, 25 Mar 2011 09:29:23 +0000 (GMT) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id 68B17101BA4; Fri, 25 Mar 2011 10:29:23 +0100 (CET) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: , Joerg Roedel Subject: [PATCH 07/13] KVM: SVM: Add intercept checks for descriptor table accesses Date: Fri, 25 Mar 2011 10:29:10 +0100 Message-ID: <1301045356-25257-8-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301045356-25257-1-git-send-email-joerg.roedel@amd.com> References: <1301045356-25257-1-git-send-email-joerg.roedel@amd.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 25 Mar 2011 09:29:48 +0000 (UTC) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 0719954..505348f 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -2370,8 +2370,17 @@ static struct opcode group5[] = { D(SrcMem | ModRM | Stack), N, }; +static struct opcode group6[] = { + DI(ModRM, sldt), + DI(ModRM, str), + DI(ModRM | Priv, lldt), + DI(ModRM | Priv, ltr), + N, N, N, N, +}; + static struct group_dual group7 = { { - N, N, DI(ModRM | SrcMem | Priv, lgdt), DI(ModRM | SrcMem | Priv, lidt), + DI(ModRM | DstMem | Priv, sgdt), DI(ModRM | DstMem | Priv, sidt), + DI(ModRM | SrcMem | Priv, lgdt), DI(ModRM | SrcMem | Priv, lidt), DI(SrcNone | ModRM | DstMem | Mov, smsw), N, DI(SrcMem16 | ModRM | Mov | Priv, lmsw), DI(SrcMem | ModRM | ByteOp | Priv | NoAccess, invlpg), @@ -2502,7 +2511,7 @@ static struct opcode opcode_table[256] = { static struct opcode twobyte_table[256] = { /* 0x00 - 0x0F */ - N, GD(0, &group7), N, N, + G(0, group6), GD(0, &group7), N, N, N, D(ImplicitOps | VendorSpecific), DI(ImplicitOps | Priv, clts), N, DI(ImplicitOps | Priv, invd), DI(ImplicitOps | Priv, wbinvd), N, N, N, D(ImplicitOps | ModRM), N, N, diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 25d7460..faa959e 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -3874,6 +3874,10 @@ static void svm_fpu_deactivate(struct kvm_vcpu *vcpu) #define POST_EX(exit) { .exit_code = (exit), \ .stage = x86_icpt_post_except, \ .valid = true } +#define POST_MEM(exit) { .exit_code = (exit), \ + .stage = x86_icpt_post_memaccess, \ + .valid = true } + static struct __x86_intercept { u32 exit_code; @@ -3887,9 +3891,18 @@ static struct __x86_intercept { [x86_intercept_smsw] = POST_EX(SVM_EXIT_READ_CR0), [x86_intercept_dr_read] = POST_EX(SVM_EXIT_READ_DR0), [x86_intercept_dr_write] = POST_EX(SVM_EXIT_WRITE_DR0), + [x86_intercept_sldt] = POST_MEM(SVM_EXIT_LDTR_READ), + [x86_intercept_str] = POST_MEM(SVM_EXIT_TR_READ), + [x86_intercept_lldt] = POST_MEM(SVM_EXIT_LDTR_WRITE), + [x86_intercept_ltr] = POST_MEM(SVM_EXIT_TR_WRITE), + [x86_intercept_sgdt] = POST_MEM(SVM_EXIT_GDTR_READ), + [x86_intercept_sidt] = POST_MEM(SVM_EXIT_IDTR_READ), + [x86_intercept_lgdt] = POST_MEM(SVM_EXIT_GDTR_WRITE), + [x86_intercept_lidt] = POST_MEM(SVM_EXIT_IDTR_WRITE), }; #undef POST_EX +#undef POST_MEM static int svm_check_intercept(struct kvm_vcpu *vcpu, struct x86_instruction_info *info,