From patchwork Mon Jun 27 13:22:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avi Kivity X-Patchwork-Id: 920872 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p5RDdiKk019888 for ; Mon, 27 Jun 2011 13:39:48 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756346Ab1F0NYg (ORCPT ); Mon, 27 Jun 2011 09:24:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:9377 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759983Ab1F0NWQ (ORCPT ); Mon, 27 Jun 2011 09:22:16 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p5RDMDTY013831 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 27 Jun 2011 09:22:13 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p5RDMCrs024264; Mon, 27 Jun 2011 09:22:12 -0400 Received: from s01.tlv.redhat.com (s01.tlv.redhat.com [10.35.255.8]) by cleopatra.tlv.redhat.com (Postfix) with ESMTP id F3ADBB0647; Mon, 27 Jun 2011 16:22:09 +0300 (IDT) From: Avi Kivity To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org Subject: [RFC v2 16/20] cirrus: simplify mmio BAR access functions Date: Mon, 27 Jun 2011 16:22:03 +0300 Message-Id: <1309180927-19003-17-git-send-email-avi@redhat.com> In-Reply-To: <1309180927-19003-1-git-send-email-avi@redhat.com> References: <1309180927-19003-1-git-send-email-avi@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Mon, 27 Jun 2011 13:39:48 +0000 (UTC) Make use of the memory API's ability to satisfy multi-byte accesses via multiple single-byte accesses. Signed-off-by: Avi Kivity --- hw/cirrus_vga.c | 82 +++++++------------------------------------------------ 1 files changed, 10 insertions(+), 72 deletions(-) diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index 0cce453..0cb34d9 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -2830,11 +2830,10 @@ static void cirrus_vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) * ***************************************/ -static uint32_t cirrus_mmio_readb(void *opaque, target_phys_addr_t addr) +static uint64_t cirrus_mmio_read(MemoryRegion *mr, target_phys_addr_t addr, + unsigned size) { - CirrusVGAState *s = opaque; - - addr &= CIRRUS_PNPMMIO_SIZE - 1; + CirrusVGAState *s = container_of(mr, CirrusVGAState, cirrus_mmio_io); if (addr >= 0x100) { return cirrus_mmio_blt_read(s, addr - 0x100); @@ -2843,32 +2842,10 @@ static uint32_t cirrus_mmio_readb(void *opaque, target_phys_addr_t addr) } } -static uint32_t cirrus_mmio_readw(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_mmio_readb(opaque, addr); - v |= cirrus_mmio_readb(opaque, addr + 1) << 8; - return v; -} - -static uint32_t cirrus_mmio_readl(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_mmio_readb(opaque, addr); - v |= cirrus_mmio_readb(opaque, addr + 1) << 8; - v |= cirrus_mmio_readb(opaque, addr + 2) << 16; - v |= cirrus_mmio_readb(opaque, addr + 3) << 24; - return v; -} - -static void cirrus_mmio_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) +static void cirrus_mmio_write(MemoryRegion *mr, target_phys_addr_t addr, + uint64_t val, unsigned size) { - CirrusVGAState *s = opaque; - - addr &= CIRRUS_PNPMMIO_SIZE - 1; + CirrusVGAState *s = container_of(mr, CirrusVGAState, cirrus_mmio_io); if (addr >= 0x100) { cirrus_mmio_blt_write(s, addr - 0x100, val); @@ -2877,53 +2854,14 @@ static void cirrus_mmio_writeb(void *opaque, target_phys_addr_t addr, } } -static void cirrus_mmio_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_mmio_writeb(opaque, addr, val & 0xff); - cirrus_mmio_writeb(opaque, addr + 1, (val >> 8) & 0xff); -} - -static void cirrus_mmio_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_mmio_writeb(opaque, addr, val & 0xff); - cirrus_mmio_writeb(opaque, addr + 1, (val >> 8) & 0xff); - cirrus_mmio_writeb(opaque, addr + 2, (val >> 16) & 0xff); - cirrus_mmio_writeb(opaque, addr + 3, (val >> 24) & 0xff); -} - - -static uint64_t cirrus_mmio_read(MemoryRegion *mr, target_phys_addr_t addr, - unsigned size) -{ - CirrusVGAState *s = container_of(mr, CirrusVGAState, cirrus_mmio_io); - - switch (size) { - case 1: return cirrus_mmio_readb(s, addr); - case 2: return cirrus_mmio_readw(s, addr); - case 4: return cirrus_mmio_readl(s, addr); - default: abort(); - } -}; - -static void cirrus_mmio_write(MemoryRegion *mr, target_phys_addr_t addr, - uint64_t data, unsigned size) -{ - CirrusVGAState *s = container_of(mr, CirrusVGAState, cirrus_mmio_io); - - switch (size) { - case 1: return cirrus_mmio_writeb(s, addr, data); - case 2: return cirrus_mmio_writew(s, addr, data); - case 4: return cirrus_mmio_writel(s, addr, data); - default: abort(); - } -}; - static MemoryRegionOps cirrus_mmio_io_ops = { .read = cirrus_mmio_read, .write = cirrus_mmio_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, }; /* load/save state */