From patchwork Wed Aug 3 11:55:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avi Kivity X-Patchwork-Id: 1031152 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p73BuUX4002002 for ; Wed, 3 Aug 2011 11:56:30 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755324Ab1HCL40 (ORCPT ); Wed, 3 Aug 2011 07:56:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:18817 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755151Ab1HCL4P (ORCPT ); Wed, 3 Aug 2011 07:56:15 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p73BuDxl028770 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 3 Aug 2011 07:56:13 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p73BuChC020751; Wed, 3 Aug 2011 07:56:12 -0400 Received: from s01.tlv.redhat.com (s01.tlv.redhat.com [10.35.255.8]) by cleopatra.tlv.redhat.com (Postfix) with ESMTP id D6D46250B3C; Wed, 3 Aug 2011 14:56:10 +0300 (IDT) From: Avi Kivity To: Anthony Liguori , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org Subject: [PATCH v2 05/38] cirrus: simplify bitblt BAR access functions Date: Wed, 3 Aug 2011 14:55:35 +0300 Message-Id: <1312372568-5215-6-git-send-email-avi@redhat.com> In-Reply-To: <1312372568-5215-1-git-send-email-avi@redhat.com> References: <1312372568-5215-1-git-send-email-avi@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 03 Aug 2011 11:56:30 +0000 (UTC) Make use of the memory API's ability to satisfy multi-byte accesses via multiple single-byte accesses. Reviewed-by: Richard Henderson Signed-off-by: Avi Kivity --- hw/cirrus_vga.c | 81 +++++++++---------------------------------------------- 1 files changed, 13 insertions(+), 68 deletions(-) diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index 6e1aa75..b8a51b4 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -2445,37 +2445,23 @@ static void cirrus_linear_write(void *opaque, target_phys_addr_t addr, ***************************************/ -static uint32_t cirrus_linear_bitblt_readb(void *opaque, target_phys_addr_t addr) +static uint64_t cirrus_linear_bitblt_read(void *opaque, + target_phys_addr_t addr, + unsigned size) { + CirrusVGAState *s = opaque; uint32_t ret; /* XXX handle bitblt */ + (void)s; ret = 0xff; return ret; } -static uint32_t cirrus_linear_bitblt_readw(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_linear_bitblt_readb(opaque, addr); - v |= cirrus_linear_bitblt_readb(opaque, addr + 1) << 8; - return v; -} - -static uint32_t cirrus_linear_bitblt_readl(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_linear_bitblt_readb(opaque, addr); - v |= cirrus_linear_bitblt_readb(opaque, addr + 1) << 8; - v |= cirrus_linear_bitblt_readb(opaque, addr + 2) << 16; - v |= cirrus_linear_bitblt_readb(opaque, addr + 3) << 24; - return v; -} - -static void cirrus_linear_bitblt_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) +static void cirrus_linear_bitblt_write(void *opaque, + target_phys_addr_t addr, + uint64_t val, + unsigned size) { CirrusVGAState *s = opaque; @@ -2488,55 +2474,14 @@ static void cirrus_linear_bitblt_writeb(void *opaque, target_phys_addr_t addr, } } -static void cirrus_linear_bitblt_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_linear_bitblt_writeb(opaque, addr, val & 0xff); - cirrus_linear_bitblt_writeb(opaque, addr + 1, (val >> 8) & 0xff); -} - -static void cirrus_linear_bitblt_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_linear_bitblt_writeb(opaque, addr, val & 0xff); - cirrus_linear_bitblt_writeb(opaque, addr + 1, (val >> 8) & 0xff); - cirrus_linear_bitblt_writeb(opaque, addr + 2, (val >> 16) & 0xff); - cirrus_linear_bitblt_writeb(opaque, addr + 3, (val >> 24) & 0xff); -} - -static uint64_t cirrus_linear_bitblt_read(void *opaque, - target_phys_addr_t addr, - unsigned size) -{ - CirrusVGAState *s = opaque; - - switch (size) { - case 1: return cirrus_linear_bitblt_readb(s, addr); - case 2: return cirrus_linear_bitblt_readw(s, addr); - case 4: return cirrus_linear_bitblt_readl(s, addr); - default: abort(); - } -}; - -static void cirrus_linear_bitblt_write(void *opaque, - target_phys_addr_t addr, - uint64_t data, - unsigned size) -{ - CirrusVGAState *s = opaque; - - switch (size) { - case 1: return cirrus_linear_bitblt_writeb(s, addr, data); - case 2: return cirrus_linear_bitblt_writew(s, addr, data); - case 4: return cirrus_linear_bitblt_writel(s, addr, data); - default: abort(); - } -}; - static const MemoryRegionOps cirrus_linear_bitblt_io_ops = { .read = cirrus_linear_bitblt_read, .write = cirrus_linear_bitblt_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, }; #include "exec-memory.h"