diff mbox

x86, amd: rename vmmu support capability

Message ID 1342202575.2706.4.camel@offbook (mailing list archive)
State New, archived
Headers show

Commit Message

Davidlohr Bueso July 13, 2012, 6:02 p.m. UTC 
From: Davidlohr Bueso <dave@gnu.org>

AMD has renamed nested page table technology to rapid virtualization indexing,
reflect this change in the kernel.

Signed-off-by: Davidlohr Bueso <dave@gnu.org>
---
 arch/x86/include/asm/cpufeature.h |    2 +-
 arch/x86/kernel/cpu/scattered.c   |    2 +-
 arch/x86/kvm/svm.c                |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

Borislav Petkov July 14, 2012, 10:19 a.m. UTC | #1 
On Fri, Jul 13, 2012 at 08:02:55PM +0200, Davidlohr Bueso wrote:
> From: Davidlohr Bueso <dave@gnu.org>
> 
> AMD has renamed nested page table technology to rapid virtualization indexing,
> reflect this change in the kernel.
> 
> Signed-off-by: Davidlohr Bueso <dave@gnu.org>

You know that /proc/cpuinfo is a userspace ABI, right?

And are you sure nothing is using that string -
"npt" - since it got added almost three years ago by
414bb144efa2d2fe16d104d836d0d6b6e9265788?
Davidlohr Bueso July 14, 2012, 1:33 p.m. UTC | #2 
On Sat, 2012-07-14 at 12:19 +0200, Borislav Petkov wrote:
> On Fri, Jul 13, 2012 at 08:02:55PM +0200, Davidlohr Bueso wrote:
> > From: Davidlohr Bueso <dave@gnu.org>
> > 
> > AMD has renamed nested page table technology to rapid virtualization indexing,
> > reflect this change in the kernel.
> > 
> > Signed-off-by: Davidlohr Bueso <dave@gnu.org>
> 
> You know that /proc/cpuinfo is a userspace ABI, right?

Yes.

> 
> And are you sure nothing is using that string -
> "npt" - since it got added almost three years ago by
> 414bb144efa2d2fe16d104d836d0d6b6e9265788?

AFAIK no, it's not being used - that doesn't mean, of course, that there
are no users.

Thanks,
Davidlohr

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H. Peter Anvin July 14, 2012, 1:38 p.m. UTC | #3 
Yep, NAK on this one.

Borislav Petkov <bp@alien8.de> wrote:

>On Fri, Jul 13, 2012 at 08:02:55PM +0200, Davidlohr Bueso wrote:
>> From: Davidlohr Bueso <dave@gnu.org>
>> 
>> AMD has renamed nested page table technology to rapid virtualization
>indexing,
>> reflect this change in the kernel.
>> 
>> Signed-off-by: Davidlohr Bueso <dave@gnu.org>
>
>You know that /proc/cpuinfo is a userspace ABI, right?
>
>And are you sure nothing is using that string -
>"npt" - since it got added almost three years ago by
>414bb144efa2d2fe16d104d836d0d6b6e9265788?
>
>-- 
>Regards/Gruss,
>    Boris.
Davidlohr Bueso July 14, 2012, 2:28 p.m. UTC | #4 
On Sat, 2012-07-14 at 15:38 +0200, H. Peter Anvin wrote:
> Yep, NAK on this one.

Ok, we could at least add a comment when defining X86_FEATURE_NPT.

Thanks,
Davidlohr

> 
> Borislav Petkov <bp@alien8.de> wrote:
> 
> >On Fri, Jul 13, 2012 at 08:02:55PM +0200, Davidlohr Bueso wrote:
> >> From: Davidlohr Bueso <dave@gnu.org>
> >> 
> >> AMD has renamed nested page table technology to rapid virtualization
> >indexing,
> >> reflect this change in the kernel.
> >> 
> >> Signed-off-by: Davidlohr Bueso <dave@gnu.org>
> >
> >You know that /proc/cpuinfo is a userspace ABI, right?
> >
> >And are you sure nothing is using that string -
> >"npt" - since it got added almost three years ago by
> >414bb144efa2d2fe16d104d836d0d6b6e9265788?
> >
> >-- 
> >Regards/Gruss,
> >    Boris.
> 


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Borislav Petkov July 14, 2012, 5:32 p.m. UTC | #5 
On Sat, Jul 14, 2012 at 04:28:51PM +0200, Davidlohr Bueso wrote:
> On Sat, 2012-07-14 at 15:38 +0200, H. Peter Anvin wrote:
> > Yep, NAK on this one.
> 
> Ok, we could at least add a comment when defining X86_FEATURE_NPT.

And the valid, sane, technical reason for having a comment where any
internet search could do, is... ?
diff mbox

Patch

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index f91e80f..a6fa778 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -185,7 +185,7 @@ 
 #define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT         (8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID        (8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT		(8*32+ 5) /* AMD Nested Page Table support */
+#define X86_FEATURE_RVI		(8*32+ 5) /* AMD Rapid Virtualization Indexing support */
 #define X86_FEATURE_LBRV	(8*32+ 6) /* AMD LBR Virtualization support */
 #define X86_FEATURE_SVML	(8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
 #define X86_FEATURE_NRIPS	(8*32+ 8) /* "nrip_save" AMD SVM next_rip save */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index ee8e9ab..78ec9e6 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -41,7 +41,7 @@  void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
 		{ X86_FEATURE_XSAVEOPT,		CR_EAX,	0, 0x0000000d, 1 },
 		{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
 		{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },
-		{ X86_FEATURE_NPT,		CR_EDX, 0, 0x8000000a, 0 },
+		{ X86_FEATURE_RVI,		CR_EDX, 0, 0x8000000a, 0 },
 		{ X86_FEATURE_LBRV,		CR_EDX, 1, 0x8000000a, 0 },
 		{ X86_FEATURE_SVML,		CR_EDX, 2, 0x8000000a, 0 },
 		{ X86_FEATURE_NRIPS,		CR_EDX, 3, 0x8000000a, 0 },
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index f75af40..6863898 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -900,7 +900,7 @@  static __init int svm_hardware_setup(void)
 			goto err;
 	}
 
-	if (!boot_cpu_has(X86_FEATURE_NPT))
+	if (!boot_cpu_has(X86_FEATURE_RVI))
 		npt_enabled = false;
 
 	if (npt_enabled && !npt) {