From patchwork Wed Jan 9 18:53:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1954081 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id BD693E019C for ; Wed, 9 Jan 2013 18:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932466Ab3AISx2 (ORCPT ); Wed, 9 Jan 2013 13:53:28 -0500 Received: from mx1.redhat.com ([209.132.183.28]:16787 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932430Ab3AISxK (ORCPT ); Wed, 9 Jan 2013 13:53:10 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r09IqR4C015983 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 9 Jan 2013 13:52:28 -0500 Received: from blackpad.lan.raisama.net (vpn1-7-24.gru2.redhat.com [10.97.7.24]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r09IqRet007704; Wed, 9 Jan 2013 13:52:27 -0500 Received: by blackpad.lan.raisama.net (Postfix, from userid 500) id E5CDB203D38; Wed, 9 Jan 2013 16:54:04 -0200 (BRST) From: Eduardo Habkost To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Igor Mammedov , kvm@vger.kernel.org Subject: [RFC 07/12] target-i386/cpu: Introduce apic_id_for_cpu() function Date: Wed, 9 Jan 2013 16:53:47 -0200 Message-Id: <1357757632-1950-8-git-send-email-ehabkost@redhat.com> In-Reply-To: <1357757632-1950-1-git-send-email-ehabkost@redhat.com> References: <1357757632-1950-1-git-send-email-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This function will be used by both the CPU initialization code and the fw_cfg table initialization code. Later this function will be updated to generate APIC IDs according to the CPU topology. Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 17 ++++++++++++++++- target-i386/cpu.h | 2 ++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 492656c..33787dc 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2192,6 +2192,21 @@ void x86_cpu_realize(Object *obj, Error **errp) cpu_reset(CPU(cpu)); } +/* Calculates initial APIC ID for a specific CPU index + * + * Currently we need to be able to calculate the APIC ID from the CPU index + * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have + * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of + * all CPUs up to max_cpus. + */ +uint32_t apic_id_for_cpu(unsigned int cpu_index) +{ + /* right now APIC ID == CPU index. this will eventually change to use + * the CPU topology configuration properly + */ + return cpu_index; +} + static void x86_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); @@ -2226,7 +2241,7 @@ static void x86_cpu_initfn(Object *obj) x86_cpuid_get_tsc_freq, x86_cpuid_set_tsc_freq, NULL, NULL, NULL); - env->cpuid_apic_id = cs->cpu_index; + env->cpuid_apic_id = apic_id_for_cpu(cs->cpu_index); /* init various static tables used in TCG mode */ if (tcg_enabled() && !inited) { diff --git a/target-i386/cpu.h b/target-i386/cpu.h index f3c9df5..dbd9899 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1238,4 +1238,6 @@ void disable_kvm_pv_eoi(void); /* Return name of 32-bit register, from a R_* constant */ const char *get_register_name_32(unsigned int reg); +uint32_t apic_id_for_cpu(unsigned int cpu_index); + #endif /* CPU_I386_H */