From patchwork Tue Mar 26 17:01:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 2341151 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id F1E8AE014B for ; Tue, 26 Mar 2013 17:02:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752750Ab3CZRCZ (ORCPT ); Tue, 26 Mar 2013 13:02:25 -0400 Received: from service87.mimecast.com ([91.220.42.44]:43661 "EHLO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752527Ab3CZRCW (ORCPT ); Tue, 26 Mar 2013 13:02:22 -0400 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 26 Mar 2013 17:02:13 +0000 Received: from e102391-lin.cambridge.arm.com ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 26 Mar 2013 17:01:43 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Cc: catalin.marinas@arm.com, will.deacon@arm.com Subject: [PATCH v2 28/30] arm64: KVM: 32bit specific register world switch Date: Tue, 26 Mar 2013 17:01:23 +0000 Message-Id: <1364317285-20937-29-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1364317285-20937-1-git-send-email-marc.zyngier@arm.com> References: <1364317285-20937-1-git-send-email-marc.zyngier@arm.com> X-OriginalArrivalTime: 26 Mar 2013 17:01:43.0122 (UTC) FILETIME=[97611320:01CE2A43] X-MC-Unique: 113032617021305901 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Allow registers specific to 32bit guests to be saved/restored during the world switch. Signed-off-by: Marc Zyngier --- arch/arm64/kvm/hyp.S | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S index 4b271b3..55bc3c3 100644 --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -266,6 +266,74 @@ __kvm_hyp_code_start: msr cntkctl_el1, x23 .endm +.macro skip_32bit_state tmp, target + // Skip 32bit state if not needed + mrs \tmp, hcr_el2 + tbnz \tmp, #HCR_RW_SHIFT, \target +.endm + +.macro skip_tee_state tmp, target + // Skip ThumbEE state if not needed + mrs \tmp, id_pfr0_el1 + tbz \tmp, #12, \target +.endm + +.macro save_guest_32bit_state + skip_32bit_state x3, 1f + + add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT) + mrs x4, spsr_abt + mrs x5, spsr_und + mrs x6, spsr_irq + mrs x7, spsr_fiq + stp x4, x5, [x3] + stp x6, x7, [x3, #16] + + add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2) + mrs x4, dacr32_el2 + mrs x5, ifsr32_el2 + mrs x6, fpexc32_el2 + mrs x7, dbgvcr32_el2 + stp x4, x5, [x3] + stp x6, x7, [x3, #16] + + skip_tee_state x8, 1f + + add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1) + mrs x4, teecr32_el1 + mrs x5, teehbr32_el1 + stp x4, x5, [x3] +1: +.endm + +.macro restore_guest_32bit_state + skip_32bit_state x3, 1f + + add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT) + ldp x4, x5, [x3] + ldp x6, x7, [x3, #16] + msr spsr_abt, x4 + msr spsr_und, x5 + msr spsr_irq, x6 + msr spsr_fiq, x7 + + add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2) + ldp x4, x5, [x3] + ldp x6, x7, [x3, #16] + msr dacr32_el2, x4 + msr ifsr32_el2, x5 + msr fpexc32_el2, x6 + msr dbgvcr32_el2, x7 + + skip_tee_state x8, 1f + + add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1) + ldp x4, x5, [x3] + msr teecr32_el1, x4 + msr teehbr32_el1, x5 +1: +.endm + .macro activate_traps ldr x2, [x0, #VCPU_IRQ_LINES] ldr x1, [x0, #VCPU_HCR_EL2] @@ -494,6 +562,7 @@ ENTRY(__kvm_vcpu_run) bl __restore_sysregs bl __restore_fpsimd + restore_guest_32bit_state restore_guest_regs // That's it, no more messing around. @@ -510,6 +579,7 @@ __kvm_vcpu_return: save_guest_regs bl __save_fpsimd bl __save_sysregs + save_guest_32bit_state save_timer_state save_vgic_state