From patchwork Thu Jun 20 14:36:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arthur Chunqi Li X-Patchwork-Id: 2756481 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DB76EC0AB1 for ; Thu, 20 Jun 2013 14:36:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 854EF201DD for ; Thu, 20 Jun 2013 14:36:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D1927201C2 for ; Thu, 20 Jun 2013 14:36:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757583Ab3FTOgc (ORCPT ); Thu, 20 Jun 2013 10:36:32 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:47630 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757483Ab3FTOgb (ORCPT ); Thu, 20 Jun 2013 10:36:31 -0400 Received: by mail-pa0-f41.google.com with SMTP id bj3so6387644pad.0 for ; Thu, 20 Jun 2013 07:36:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=xC9/QMp0gg1mjUhCt/jUo16RLeO5oH06D9YQuAZ+61E=; b=S9fK7VfCVFrE2U6ZdR4EdxiFoVIH9yPfqNyNBmGav0AqmblcPHDpHb8VIrtJ4nN+hJ VU3dn9AJufO4eM8fD9ALgeorN5qcf8ZpEyis/ULxEsOdxX/Ili1Dor2HwFQz5UJJKDLu VMyRiIf4Glde4Me9dUB5Xf7F/FM2NHaOTru11n7NLnsG0Y/MfvlJm4m4aXddBU/qAY46 442NkG8mRdgh4ELsnvHDC72cLfj9vH9zItUGV3C1HJA3Zh5n8+ey5kMrY2+eSA9MjTaL oOlIsPn34QRDAHXdGLw0KDF09H/XxvPazT+8Q7yOdRyeMIbH4Nd0Gj0t8ye3GW6YWOlp qr0A== X-Received: by 10.66.232.196 with SMTP id tq4mr11962109pac.167.1371738991492; Thu, 20 Jun 2013 07:36:31 -0700 (PDT) Received: from Blade1-02.Blade1-02 ([162.105.146.101]) by mx.google.com with ESMTPSA id vu5sm1066460pab.10.2013.06.20.07.36.27 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Jun 2013 07:36:30 -0700 (PDT) From: Arthur Chunqi Li To: kvm@vger.kernel.org Cc: gleb@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, Arthur Chunqi Li Subject: [PATCH v4 2/3] kvm-unit-tests: Add a func to run instruction in emulator Date: Thu, 20 Jun 2013 22:36:08 +0800 Message-Id: <1371738969-26658-2-git-send-email-yzt356@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371738969-26658-1-git-send-email-yzt356@gmail.com> References: <1371738969-26658-1-git-send-email-yzt356@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a function trap_emulator to run an instruction in emulator. Set inregs first (%rax is invalid because it is used as return address), put instruction codec in alt_insn and call func with alt_insn_length. Get results in outregs. Signed-off-by: Arthur Chunqi Li --- x86/emulator.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/x86/emulator.c b/x86/emulator.c index 96576e5..876ee5a 100644 --- a/x86/emulator.c +++ b/x86/emulator.c @@ -11,6 +11,20 @@ int fails, tests; static int exceptions; +struct regs { + u64 rax, rbx, rcx, rdx; + u64 rsi, rdi, rsp, rbp; + u64 r8, r9, r10, r11; + u64 r12, r13, r14, r15; + u64 rip, rflags; +}; +struct regs inregs, outregs, save; + +struct insn_desc { + u64 ptr; + size_t len; +}; + void report(const char *name, int result) { ++tests; @@ -685,6 +699,87 @@ static void test_shld_shrd(u32 *mem) report("shrd (cl)", *mem == ((0x12345678 >> 3) | (5u << 29))); } +#define INSN_XCHG_ALL \ + "xchg %rax, 0+save \n\t" \ + "xchg %rbx, 8+save \n\t" \ + "xchg %rcx, 16+save \n\t" \ + "xchg %rdx, 24+save \n\t" \ + "xchg %rsi, 32+save \n\t" \ + "xchg %rdi, 40+save \n\t" \ + "xchg %rsp, 48+save \n\t" \ + "xchg %rbp, 56+save \n\t" \ + "xchg %r8, 64+save \n\t" \ + "xchg %r9, 72+save \n\t" \ + "xchg %r10, 80+save \n\t" \ + "xchg %r11, 88+save \n\t" \ + "xchg %r12, 96+save \n\t" \ + "xchg %r13, 104+save \n\t" \ + "xchg %r14, 112+save \n\t" \ + "xchg %r15, 120+save \n\t" + +asm( + ".align 4096\n\t" + "insn_page:\n\t" + "ret\n\t" + "pushf\n\t" + "push 136+save \n\t" + "popf \n\t" + INSN_XCHG_ALL + "test_insn:\n\t" + "in (%dx),%al\n\t" + ".skip 31, 0x90\n\t" + "test_insn_end:\n\t" + INSN_XCHG_ALL + "pushf \n\t" + "pop 136+save \n\t" + "popf \n\t" + "ret \n\t" + "insn_page_end:\n\t" + ".align 4096\n\t" +); + +#define MK_INSN(name, str) \ + asm ( \ + ".pushsection .data.insn \n\t" \ + "insn_" #name ": \n\t" \ + ".quad 1001f, 1002f - 1001f \n\t" \ + ".popsection \n\t" \ + ".pushsection .text.insn, \"ax\" \n\t" \ + "1001: \n\t" \ + "insn_code_" #name ": " str " \n\t" \ + "1002: \n\t" \ + ".popsection" \ + ); \ + extern struct insn_desc insn_##name; + +static void trap_emulator(uint64_t *mem, void *alt_insn_page, + struct insn_desc *alt_insn) +{ + ulong *cr3 = (ulong *)read_cr3(); + void *insn_ram; + extern u8 insn_page[], test_insn[]; + + insn_ram = vmap(virt_to_phys(insn_page), 4096); + memcpy(alt_insn_page, insn_page, 4096); + memcpy(alt_insn_page + (test_insn - insn_page), + (void *)(alt_insn->ptr), alt_insn->len); + save = inregs; + + /* Load the code TLB with insn_page, but point the page tables at + alt_insn_page (and keep the data TLB clear, for AMD decode assist). + This will make the CPU trap on the insn_page instruction but the + hypervisor will see alt_insn_page. */ + install_page(cr3, virt_to_phys(insn_page), insn_ram); + invlpg(insn_ram); + /* Load code TLB */ + asm volatile("call *%0" : : "r"(insn_ram)); + install_page(cr3, virt_to_phys(alt_insn_page), insn_ram); + /* Trap, let hypervisor emulate at alt_insn_page */ + asm volatile("call *%0": : "r"(insn_ram+1)); + + outregs = save; +} + static void advance_rip_by_3_and_note_exception(struct ex_regs *regs) { ++exceptions;