From patchwork Sun Jun 15 13:13:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Amit X-Patchwork-Id: 4354351 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0CAC9BEEAA for ; Sun, 15 Jun 2014 13:13:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 32A4120219 for ; Sun, 15 Jun 2014 13:13:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D94E320375 for ; Sun, 15 Jun 2014 13:13:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752389AbaFONNk (ORCPT ); Sun, 15 Jun 2014 09:13:40 -0400 Received: from mailgw12.technion.ac.il ([132.68.225.12]:22664 "EHLO mailgw12.technion.ac.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752198AbaFONNR (ORCPT ); Sun, 15 Jun 2014 09:13:17 -0400 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AgECAPuanVOERCABjGdsb2JhbABariIBAQaZJAGBABYPAQEBJzyEAwEBAgMnUhAgMSE2GYguAxHIcw1YhSYXhWOGcIIjBxaELQSKOY4Rj1GJQw X-IPAS-Result: AgECAPuanVOERCABjGdsb2JhbABariIBAQaZJAGBABYPAQEBJzyEAwEBAgMnUhAgMSE2GYguAxHIcw1YhSYXhWOGcIIjBxaELQSKOY4Rj1GJQw X-IronPort-AV: E=Sophos;i="5.01,481,1400014800"; d="scan'208";a="111524003" Received: from csa.cs.technion.ac.il ([132.68.32.1]) by mailgw12.technion.ac.il with ESMTP; 15 Jun 2014 16:13:07 +0300 Received: from csn.cs.technion.ac.il (csn.cs.technion.ac.il [132.68.32.15]) by csa.cs.technion.ac.il (Postfix) with ESMTP id 376BD140047; Sun, 15 Jun 2014 16:13:06 +0300 (IDT) Received: from ds-had5.cs.technion.ac.il (ds-had5.cs.technion.ac.il [132.68.206.94]) by csn.cs.technion.ac.il (Postfix) with ESMTP id 31B1D598002; Sun, 15 Jun 2014 16:13:06 +0300 (IDT) From: Nadav Amit To: pbonzini@redhat.com Cc: gleb@kernel.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Nadav Amit , Nadav Amit Subject: [PATCH 6/6] KVM: x86: check DR6/7 high-bits are clear only on long-mode Date: Sun, 15 Jun 2014 16:13:02 +0300 Message-Id: <1402837982-24959-7-git-send-email-namit@cs.technion.ac.il> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1402837982-24959-1-git-send-email-namit@cs.technion.ac.il> References: <1402837982-24959-1-git-send-email-namit@cs.technion.ac.il> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Nadav Amit When the guest sets DR6 and DR7, KVM asserts the high 32-bits are clear, and otherwise injects a #GP exception. This exception should only be injected only if running in long-mode. Signed-off-by: Nadav Amit --- arch/x86/kvm/x86.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 57eac30..71fe841 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -756,6 +756,15 @@ static void kvm_update_dr7(struct kvm_vcpu *vcpu) vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED; } +static bool is_64_bit_mode(struct kvm_vcpu *vcpu) +{ + int cs_db, cs_l; + if (!is_long_mode(vcpu)) + return false; + kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); + return cs_l; +} + static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val) { switch (dr) { @@ -769,7 +778,7 @@ static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val) return 1; /* #UD */ /* fall through */ case 6: - if (val & 0xffffffff00000000ULL) + if ((val & 0xffffffff00000000ULL) && is_64_bit_mode(vcpu)) return -1; /* #GP */ vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1; kvm_update_dr6(vcpu); @@ -779,7 +788,7 @@ static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val) return 1; /* #UD */ /* fall through */ default: /* 7 */ - if (val & 0xffffffff00000000ULL) + if ((val & 0xffffffff00000000ULL) && is_64_bit_mode(vcpu)) return -1; /* #GP */ vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1; kvm_update_dr7(vcpu);