@@ -12,7 +12,7 @@
static void generate_fdt_nodes(void *fdt, struct kvm *kvm, u32 gic_phandle)
{
int timer_interrupts[4] = {13, 14, 11, 10};
- gic__generate_fdt_nodes(fdt, gic_phandle);
+ gic__generate_fdt_nodes(fdt, gic_phandle, KVM_DEV_TYPE_ARM_VGIC_V2);
timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
}
@@ -22,13 +22,13 @@ int gic__alloc_irqnum(void)
return irq;
}
-static int gic__create_device(struct kvm *kvm)
+static int gic__create_device(struct kvm *kvm, u32 type)
{
int err;
u32 offset = 0;
u64 dist_addr = ARM_GIC_DIST_BASE;
struct kvm_create_device gic_device = {
- .type = KVM_DEV_TYPE_ARM_VGIC_V2,
+ .type = type,
};
struct kvm_device_attr offset_attr = {
.group = KVM_DEV_ARM_VGIC_GRP_ADDR_OFFSET,
@@ -51,19 +51,28 @@ static int gic__create_device(struct kvm *kvm)
gic_fd = gic_device.fd;
- if (!ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &offset_attr)) {
- err = ioctl(gic_fd, KVM_GET_DEVICE_ATTR, &offset_attr);
+ switch (type) {
+ case KVM_DEV_TYPE_ARM_VGIC_V2:
+ if (!ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &offset_attr)) {
+ err = ioctl(gic_fd, KVM_GET_DEVICE_ATTR, &offset_attr);
+ if (err)
+ return err;
+ }
+
+ cpu_if_addr += offset;
+
+ err = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &cpu_if_attr);
if (err)
return err;
+ pr_info("creating GICv2 KVM device");
+ break;
+ default:
+ return -ENODEV;
}
- cpu_if_addr += offset;
+ err = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &dist_attr);
- err = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &cpu_if_attr);
- if (err)
- return err;
-
- return ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &dist_attr);
+ return err;
}
static int gic__create_irqchip(struct kvm *kvm)
@@ -94,7 +103,7 @@ static int gic__create_irqchip(struct kvm *kvm)
return err;
}
-int gic__init_irqchip(struct kvm *kvm)
+static int gicv2__init_irqchip(struct kvm *kvm)
{
int err;
int psz;
@@ -113,13 +122,22 @@ int gic__init_irqchip(struct kvm *kvm)
}
/* Try the new way first, and fallback on legacy method otherwise */
- err = gic__create_device(kvm);
+ err = gic__create_device(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
if (err)
err = gic__create_irqchip(kvm);
return err;
}
+int gic__init_irqchip(struct kvm *kvm, u32 type)
+{
+ switch (type) {
+ case KVM_DEV_TYPE_ARM_VGIC_V2:
+ return gicv2__init_irqchip(kvm);
+ }
+ return -ENODEV;
+}
+
static int gic__init_max_irq(struct kvm *kvm)
{
u32 nr_irqs = ALIGN(irq_ids, 32) + GIC_SPI_IRQ_BASE;
@@ -142,15 +160,26 @@ static int gic__init_max_irq(struct kvm *kvm)
}
late_init(gic__init_max_irq)
-void gic__generate_fdt_nodes(void *fdt, u32 phandle)
+void gic__generate_fdt_nodes(void *fdt, u32 phandle, u32 type)
{
+ const char *compatible;
u64 reg_prop[] = {
- cpu_to_fdt64(ARM_GIC_DIST_BASE), cpu_to_fdt64(ARM_GIC_DIST_SIZE),
+ cpu_to_fdt64(ARM_GIC_DIST_BASE),
+ cpu_to_fdt64(ARM_GIC_DIST_SIZE),
cpu_to_fdt64(cpu_if_addr), cpu_to_fdt64(ARM_GIC_CPUI_SIZE),
};
+ switch (type) {
+ case KVM_DEV_TYPE_ARM_VGIC_V2:
+ compatible = "arm,cortex-a15-gic";
+ pr_info("creating FDT for a GICv2");
+ break;
+ default:
+ return;
+ }
+
_FDT(fdt_begin_node(fdt, "intc"));
- _FDT(fdt_property_string(fdt, "compatible", "arm,cortex-a15-gic"));
+ _FDT(fdt_property_string(fdt, "compatible", compatible));
_FDT(fdt_property_cell(fdt, "#interrupt-cells", GIC_FDT_IRQ_NUM_CELLS));
_FDT(fdt_property(fdt, "interrupt-controller", NULL, 0));
_FDT(fdt_property(fdt, "reg", reg_prop, sizeof(reg_prop)));
@@ -29,7 +29,7 @@
struct kvm;
int gic__alloc_irqnum(void);
-int gic__init_irqchip(struct kvm *kvm);
-void gic__generate_fdt_nodes(void *fdt, u32 phandle);
+int gic__init_irqchip(struct kvm *kvm, u32 type);
+void gic__generate_fdt_nodes(void *fdt, u32 phandle, u32 type);
#endif /* ARM_COMMON__GIC_H */
@@ -80,6 +80,6 @@ void kvm__arch_init(struct kvm *kvm, const char *hugetlbfs_path, u64 ram_size)
MADV_MERGEABLE);
/* Initialise the virtual GIC. */
- if (gic__init_irqchip(kvm))
+ if (gic__init_irqchip(kvm, KVM_DEV_TYPE_ARM_VGIC_V2))
die("Failed to initialise virtual GIC");
}
@@ -293,7 +293,7 @@ int virtio_mmio_init(struct kvm *kvm, void *dev, struct virtio_device *vdev,
*
* virtio_mmio.devices=0x200@0xd2000000:5,0x200@0xd2000200:6
*/
- pr_info("virtio-mmio.devices=0x%x@0x%x:%d\n", VIRTIO_MMIO_IO_SIZE, vmmio->addr, line);
+ pr_info("virtio-mmio.devices=0x%x@0x%x:%d", VIRTIO_MMIO_IO_SIZE, vmmio->addr, line);
return 0;
}
Extend the vGIC handling code to deal with different IRQ chip devices instead of hard-coding the GICv2 in. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- tools/kvm/arm/aarch64/arm-cpu.c | 2 +- tools/kvm/arm/gic.c | 59 ++++++++++++++++++++++++-------- tools/kvm/arm/include/arm-common/gic.h | 4 +-- tools/kvm/arm/kvm.c | 2 +- tools/kvm/virtio/mmio.c | 2 +- 5 files changed, 49 insertions(+), 20 deletions(-)