From patchwork Mon Aug 18 09:50:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wanpeng Li X-Patchwork-Id: 4734831 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3778AC033A for ; Mon, 18 Aug 2014 09:50:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 64A702010E for ; Mon, 18 Aug 2014 09:50:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9033620145 for ; Mon, 18 Aug 2014 09:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754030AbaHRJtB (ORCPT ); Mon, 18 Aug 2014 05:49:01 -0400 Received: from mga02.intel.com ([134.134.136.20]:36086 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754023AbaHRJtA (ORCPT ); Mon, 18 Aug 2014 05:49:00 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 18 Aug 2014 02:48:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,885,1400050800"; d="scan'208";a="559946347" Received: from unknown (HELO vt-ivt2.tsp.org) ([10.239.48.107]) by orsmga001.jf.intel.com with ESMTP; 18 Aug 2014 02:48:51 -0700 From: Wanpeng Li To: Paolo Bonzini Cc: Gleb Natapov , hpa@zytor.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Wanpeng Li Subject: [PATCH 5/5] KVM: x86: #GP when attempts to write reserved bits of Variable Range MTRRs Date: Mon, 18 Aug 2014 17:50:31 +0800 Message-Id: <1408355431-115633-5-git-send-email-wanpeng.li@linux.intel.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1408355431-115633-1-git-send-email-wanpeng.li@linux.intel.com> References: <1408355431-115633-1-git-send-email-wanpeng.li@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Section 11.11.2.3 of the SDM mentions "All other bits in the IA32_MTRR_PHYSBASEn and IA32_MTRR_PHYSMASKn registers are reserved; the processor generates a general-protection exception(#GP) if software attempts to write to them". This patch do it in kvm. Signed-off-by: Wanpeng Li --- arch/x86/kvm/x86.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index caaffeb..aa64c70 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1769,11 +1769,22 @@ static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data) /* variable MTRRs */ if (msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR) { int idx, is_mtrr_mask; + u64 mask = 0; idx = (msr - 0x200) / 2; is_mtrr_mask = msr - 0x200 - 2 * idx; - if (!is_mtrr_mask) - return valid_mtrr_type(data & 0xff); + for (i = 63; i > boot_cpu_data.x86_phys_bits; i--) + mask |= (1ULL << i); + if (!is_mtrr_mask) { + if (!valid_mtrr_type(data & 0xff)) + return false; + mask |= 0xf00; + } else + mask |= 0x7ff; + if (data & mask) { + kvm_inject_gp(vcpu, 0); + return false; + } } return true; }