From patchwork Mon Sep 8 20:29:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 4864511 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6D1A49F32E for ; Mon, 8 Sep 2014 20:30:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80E6E20160 for ; Mon, 8 Sep 2014 20:30:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4AFBC2015D for ; Mon, 8 Sep 2014 20:30:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754494AbaIHUa2 (ORCPT ); Mon, 8 Sep 2014 16:30:28 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:35104 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754122AbaIHUa1 (ORCPT ); Mon, 8 Sep 2014 16:30:27 -0400 Received: by mail-wi0-f181.google.com with SMTP id e4so3361826wiv.2 for ; Mon, 08 Sep 2014 13:30:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=G8nqfLZCi+pzxLE+8Bl9f6dRYFBIvJJrPHzgTB6wIV0=; b=ff2wAyelnpHBP52RZEKI55wsX7N0Rw+5wfdKV6dJ7A2W8xZh9KST3ksBLVl/MvbFfH XPkV/JEmiSE/DfUif+FEd9dTDgeny24lpYSypTdXPX8gbuoZNL6bw5hH7fcz6jd7Kn31 4cqASUek+ur5Z/Be1/Dj+/up+aQ1C2Uvt+bBWrM7s+8U60xKo5VIcNpwdG9i0diwddi+ cr41y8OBH02cHLVGd0TaX1QJxiexJx5xDKh6fYtl15Ooy3g+ocQBWw/TB5mlv59Byb7U cVpL33fOHeRyElfIAbv5SZ5vKKRlSnHOiJoyFpzeMQiDbYmCJMsDx5dueMhewwrmWwCj OOsw== X-Gm-Message-State: ALoCoQl4VqRdcNghpc+1Bf4BqgNgj3c/XtZlNOc4zyKoN8iTUnWoWst35X5Aj/Qp9/FzpSAiIb4M X-Received: by 10.180.19.233 with SMTP id i9mr5602447wie.17.1410208226155; Mon, 08 Sep 2014 13:30:26 -0700 (PDT) Received: from ards-macbook-pro.local (cag06-7-83-153-85-71.fbx.proxad.net. [83.153.85.71]) by mx.google.com with ESMTPSA id gm2sm13080583wib.15.2014.09.08.13.30.22 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 08 Sep 2014 13:30:25 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, marc.zyngier@arm.com, christoffer.dall@linaro.org Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, peter.maydell@linaro.org, lersek@redhat.com, Ard Biesheuvel Subject: [PATCH] ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault() Date: Mon, 8 Sep 2014 22:29:27 +0200 Message-Id: <1410208167-32532-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ISS encoding for an exception from a Data Abort has a WnR bit[6] that indicates whether the Data Abort was caused by a read or a write instruction. While there are several fields in the encoding that are only valid if the ISV bit[24] is set, WnR is not one of them, so we can read it unconditionally. Signed-off-by: Ard Biesheuvel Acked-by: Laszlo Ersek --- This fixes an issue I observed with UEFI running under QEMU/KVM using NOR flash emulation and the upcoming KVM_CAP_READONLY_MEM support, where NOR flash reads were mistaken for NOR flash writes, resulting in all read accesses to go through the MMIO emulation layer. arch/arm/include/asm/kvm_mmu.h | 5 +---- arch/arm64/include/asm/kvm_mmu.h | 5 +---- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h index 5cc0b0f5f72f..fad5648980ad 100644 --- a/arch/arm/include/asm/kvm_mmu.h +++ b/arch/arm/include/asm/kvm_mmu.h @@ -83,10 +83,7 @@ static inline bool kvm_is_write_fault(unsigned long hsr) unsigned long hsr_ec = hsr >> HSR_EC_SHIFT; if (hsr_ec == HSR_EC_IABT) return false; - else if ((hsr & HSR_ISV) && !(hsr & HSR_WNR)) - return false; - else - return true; + return hsr & HSR_WNR; } static inline void kvm_clean_pgd(pgd_t *pgd) diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 8e138c7c53ac..09fd9e4c13d8 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -100,10 +100,7 @@ static inline bool kvm_is_write_fault(unsigned long esr) if (esr_ec == ESR_EL2_EC_IABT) return false; - if ((esr & ESR_EL2_ISV) && !(esr & ESR_EL2_WNR)) - return false; - - return true; + return esr & ESR_EL2_WNR; } static inline void kvm_clean_pgd(pgd_t *pgd) {}