From patchwork Tue Nov 25 16:10:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 5380471 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 27910C11AC for ; Tue, 25 Nov 2014 16:11:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4899C20114 for ; Tue, 25 Nov 2014 16:11:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AE8A72015D for ; Tue, 25 Nov 2014 16:11:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751303AbaKYQL0 (ORCPT ); Tue, 25 Nov 2014 11:11:26 -0500 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:48060 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750882AbaKYQLX (ORCPT ); Tue, 25 Nov 2014 11:11:23 -0500 Received: from localhost ([127.0.0.1] helo=zen.linaroharston) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1XtJJT-0005HW-L8; Tue, 25 Nov 2014 17:50:03 +0100 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de Cc: jan.kiszka@siemens.com, dahi@linux.vnet.ibm.com, r65777@freescale.com, bp@suse.de, pbonzini@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Gleb Natapov , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/7] KVM: arm64: guest debug, add SW break point support Date: Tue, 25 Nov 2014 16:10:02 +0000 Message-Id: <1416931805-23223-5-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1416931805-23223-1-git-send-email-alex.bennee@linaro.org> References: <1416931805-23223-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds support for SW breakpoints inserted by userspace. First we need to trap all BKPT exceptions in the hypervisor (ELS). This in controlled through the MDCR_EL2 register. I've added a new field to the vcpu structure to hold this value. There should be scope to rationlise this with the VCPU_DEBUG_FLAGS/KVM_ARM64_DEBUG_DIRTY_SHIFT manipulation in later patches. Once the exception arrives we triggers an exit from the main hypervisor loop to the hypervisor controller. The kvm_debug_exit_arch carries the address of the exception. If the controller doesn't know of breakpoint then we have a guest inserted breakpoint and the hypervisor needs to start again and deliver the exception to guest. Signed-off-by: Alex Bennée diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 2c6386e..9383359 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -2592,7 +2592,7 @@ when running. Common control bits are: The top 16 bits of the control field are architecture specific control flags which can include the following: - - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86] + - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86, arm64] - KVM_GUESTDBG_USE_HW_BP: using hardware breakpoints [x86, s390] - KVM_GUESTDBG_INJECT_DB: inject DB type exception [x86] - KVM_GUESTDBG_INJECT_BP: inject BP type exception [x86] diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index a0ff410..48d26bb 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -303,6 +303,9 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg) { + /* Route debug traps to el2? */ + bool route_el2 = false; + /* If it's not enabled clear all flags */ if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { vcpu->guest_debug = 0; @@ -320,8 +323,8 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, /* Software Break Points */ if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { - kvm_info("SW BP support requested, not yet implemented\n"); - return -EINVAL; + kvm_info("SW BP support requested\n"); + route_el2 = true; } /* Hardware assisted Break and Watch points */ @@ -330,6 +333,20 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, return -EINVAL; } + /* If we are going to handle any debug exceptions we need to + * set MDCE_EL2.TDE to ensure they are routed to the + * hypervisor. If userspace determines the exception was + * actually internal to the guest it needs to handle + * re-injecting the exception. + */ + if (route_el2) { + kvm_info("routing debug exceptions"); + vcpu->arch.mdcr_el2 = MDCR_EL2_TDE; + } else { + kvm_info("not routing debug exceptions"); + vcpu->arch.mdcr_el2 = 0; + } + return 0; } diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 2012c4b..38b0f07 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -98,6 +98,7 @@ struct kvm_vcpu_arch { /* HYP configuration */ u64 hcr_el2; + u32 mdcr_el2; /* Exception Information */ struct kvm_vcpu_fault_info fault; diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index 9a9fce0..8da1043 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -122,6 +122,7 @@ int main(void) DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2)); DEFINE(VCPU_DEBUG_FLAGS, offsetof(struct kvm_vcpu, arch.debug_flags)); DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2)); + DEFINE(VCPU_MDCR_EL2, offsetof(struct kvm_vcpu, arch.mdcr_el2)); DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines)); DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context)); DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl)); diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 34b8bd0..28dc92b 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -71,6 +71,26 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) return 1; } +/** + * kvm_handle_bkpt - handle a break-point instruction + * + * @vcpu: the vcpu pointer + * + * By definition if we arrive here it's because we are routing + * all SW breakpoints to the hyper-visor as some may be a result of + * guest debugging. If user-space decides this particular break-point + * isn't for the host to handle it can re-feed the exception to the + * guest. + */ +static int kvm_handle_bkpt(struct kvm_vcpu *vcpu, struct kvm_run *run) +{ + run->exit_reason = KVM_EXIT_DEBUG; + run->debug.arch.exit_type = KVM_DEBUG_EXIT_SW_BKPT; + run->debug.arch.address = *vcpu_pc(vcpu); + kvm_info("exiting from %llx\n", run->debug.arch.address); + return 0; +} + static exit_handle_fn arm_exit_handlers[] = { [ESR_EL2_EC_WFI] = kvm_handle_wfx, [ESR_EL2_EC_CP15_32] = kvm_handle_cp15_32, @@ -85,6 +105,8 @@ static exit_handle_fn arm_exit_handlers[] = { [ESR_EL2_EC_SYS64] = kvm_handle_sys_reg, [ESR_EL2_EC_IABT] = kvm_handle_guest_abort, [ESR_EL2_EC_DABT] = kvm_handle_guest_abort, + [ESR_EL2_EC_BKPT32] = kvm_handle_bkpt, + [ESR_EL2_EC_BRK64] = kvm_handle_bkpt, }; static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S index b72aa9f..3c733ea 100644 --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -772,6 +772,10 @@ orr x2, x2, #(MDCR_EL2_TPM | MDCR_EL2_TPMCR) orr x2, x2, #(MDCR_EL2_TDRA | MDCR_EL2_TDOSA) + // Any other bits (currently TDE) + ldr x3, [x0, #VCPU_MDCR_EL2] + orr x2, x2, x3 + // Check for KVM_ARM64_DEBUG_DIRTY, and set debug to trap // if not dirty. ldr x3, [x0, #VCPU_DEBUG_FLAGS]