| Message ID | 1420814246-19033-1-git-send-email-rkrcmar@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2015-01-09 15:37+0100, Radim Kr?má?: > Lowest priority should take the task priority into account. > > SDM 10.6.2.4 Lowest Priority Delivery Mode. > (Too long to quote; second and last paragraphs are relevant.) > > Before this patch, we strived to have the same amount of handled > lowest-priority interrupts on all VCPUs. > This is only a complication, but kept for compatibility. > Real modern Intels can't send lowest priority IPIs and the chipset > directs external ones using processors' TPR. False, new Intels most likely don't consider TPR. Please don't include this patch. > AMD still has rough edges. AMD behaves like its documentation states, > + /* XXX: AMD (2:16.6.2 Lowest Priority Messages and Arbitration) > + * - uses the APR register (which also considers ISR and IRR), > + * - chooses the highest APIC ID when APRs are identical, > + * - and allows a focus processor. but we don't differentiate. (It shouldn't create AMD-specific bugs.) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index a688fbffb34e..5b9d8c589bba 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -833,7 +833,15 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2) { - return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio; + /* XXX: AMD (2:16.6.2 Lowest Priority Messages and Arbitration) + * - uses the APR register (which also considers ISR and IRR), + * - chooses the highest APIC ID when APRs are identical, + * - and allows a focus processor. + * XXX: pseudo-balancing with apic_arb_prio is a KVM-specific feature + */ + int tpr = kvm_apic_get_reg(vcpu1->arch.apic, APIC_TASKPRI) - + kvm_apic_get_reg(vcpu2->arch.apic, APIC_TASKPRI); + return tpr ? : vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio; } static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector)
Lowest priority should take the task priority into account. SDM 10.6.2.4 Lowest Priority Delivery Mode. (Too long to quote; second and last paragraphs are relevant.) Before this patch, we strived to have the same amount of handled lowest-priority interrupts on all VCPUs. This is only a complication, but kept for compatibility. Real modern Intels can't send lowest priority IPIs and the chipset directs external ones using processors' TPR. AMD still has rough edges. Signed-off-by: Radim Kr?má? <rkrcmar@redhat.com> --- arch/x86/kvm/lapic.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)