From patchwork Thu Aug 13 11:33:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 7007891 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9F6C8C05AC for ; Thu, 13 Aug 2015 11:38:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CB31820497 for ; Thu, 13 Aug 2015 11:38:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E37222041E for ; Thu, 13 Aug 2015 11:38:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752902AbbHMLg6 (ORCPT ); Thu, 13 Aug 2015 07:36:58 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:53107 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752564AbbHMLeh (ORCPT ); Thu, 13 Aug 2015 07:34:37 -0400 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-19-ngB8BCVWRXOZzbK3gnZyJw-7; Thu, 13 Aug 2015 12:34:36 +0100 Received: from e106634-lin.cambridge.arm.com ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 13 Aug 2015 12:34:34 +0100 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, marc.zyngier@arm.com, "Suzuki K. Poulose" , Christoffer Dall Subject: [PATCH 09/14] arm64: Cleanup VTCR_EL2 computation Date: Thu, 13 Aug 2015 12:33:59 +0100 Message-Id: <1439465645-22584-10-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1439465645-22584-1-git-send-email-suzuki.poulose@arm.com> References: <1439465645-22584-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 13 Aug 2015 11:34:34.0445 (UTC) FILETIME=[072927D0:01D0D5BC] X-MC-Unique: ngB8BCVWRXOZzbK3gnZyJw-7 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Suzuki K. Poulose" No functional changes. Group the common bits for VCTR_EL2 initialisation for better readability. The granule size and the entry level are controlled by the page size. Cc: Christoffer Dall Cc: Marc Zyngier Cc: kvmarm@lists.cs.columbia.edu Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/kvm_arm.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 52dc9cc..dcaf799 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -138,6 +138,9 @@ * The magic numbers used for VTTBR_X in this patch can be found in Tables * D4-23 and D4-25 in ARM DDI 0487A.b. */ +#define VTCR_EL2_COMMON_BITS (VTCR_EL2_SH0_INNER | VTCR_EL2_ORGN0_WBWA | \ + VTCR_EL2_IRGN0_WBWA | VTCR_EL2_T0SZ_40B) + #ifdef CONFIG_ARM64_64K_PAGES /* * Stage2 translation configuration: @@ -145,9 +148,8 @@ * 64kB pages (TG0 = 1) * 2 level page tables (SL = 1) */ -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SL0_LVL1 | \ + VTCR_EL2_COMMON_BITS) #define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) #else /* @@ -156,9 +158,8 @@ * 4kB pages (TG0 = 0) * 3 level page tables (SL = 1) */ -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SL0_LVL1 | \ + VTCR_EL2_COMMON_BITS) #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) #endif