From patchwork Tue Dec 8 18:32:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 7801121 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EC5A8BEEE1 for ; Tue, 8 Dec 2015 18:33:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EAC45203AA for ; Tue, 8 Dec 2015 18:33:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A3A8F20392 for ; Tue, 8 Dec 2015 18:33:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752406AbbLHSdG (ORCPT ); Tue, 8 Dec 2015 13:33:06 -0500 Received: from mail-wm0-f51.google.com ([74.125.82.51]:38607 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752369AbbLHSdE (ORCPT ); Tue, 8 Dec 2015 13:33:04 -0500 Received: by wmec201 with SMTP id c201so41360101wme.1 for ; Tue, 08 Dec 2015 10:33:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=v3cauBm4dJONtkEsFvIIgg73hh7AIjlJ7baAsCGEpLA=; b=X2ourXimXRTjSlwWUHSarByYx5Ox7Jt+KLb3a0cO9EWHzg8KNxZ+qBGfKSOXXNP21Y k/kg6cyqydjjbAe/8xJUvrV4E0x4qj9yqbCQybwG4FpPgz+JODu9RSUrkBdo+zwVIygX zr+sQE4r190k8bPcezPMx2ja76H2m8uYdWeR3NPxGVj9mWoeHZ7i79CjoDGbgJHaEWBX z3jYVUoo2hS3YZxVFaqA6C3tLL2/4xVdRJM5sCi074t36VI/xf8NepQRLj559+daPs+v w2z4MRm1PII28dhZPQJsrslMz3YsP+n5zk2W8K/mYUCSmMoRhSBI9ICE4Ruh2i1HsBIR 1yYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-type:content-transfer-encoding; bh=v3cauBm4dJONtkEsFvIIgg73hh7AIjlJ7baAsCGEpLA=; b=mhDenlKSB2ToeMw/LxajF/icw3AD8um3WBPlyTxruf1Fbh8Gb5/r+P6T1ggiaCSFix V7icfmVMZKzfDjJWiK9NzeVLtPF8iZyzWTNPehkjNF1CsumoaCsd40nM2yDV2+eHP8al FRY6o7aXxRziXxaCOi+FOmgvbDRmbpPLj652lZjfNS7Pew/YTvhkYwcSYxWEQHBZggIs twqpOSPbLkKOQ3QIY10tVAQ8IcRXVPuwrkeRenGbcSNvZnUThnwyOo6KyIdLYmdr+/SB 6EYMJ4prWrTiCapmHFBmYTNkbviQR9Skx/TCoArvukHG+NkYJgfpERVWgeCI1q8Miip3 d/8w== X-Gm-Message-State: ALoCoQlU1eejDJArGyBd0YckLfJ5LixH7S0cMUqnDWa9TMBvX4RQnq6ko0Wc27qutERtXR9w3fYeI4AodFaeWN9J+x8KUcqWrQ== X-Received: by 10.28.215.209 with SMTP id o200mr5852456wmg.31.1449599581950; Tue, 08 Dec 2015 10:33:01 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id jm4sm4106325wjb.7.2015.12.08.10.32.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Dec 2015 10:33:00 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id E12DA3E06BD; Tue, 8 Dec 2015 18:32:56 +0000 (GMT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org, zhichao.huang@linaro.org Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v10 5/6] target-arm: kvm - re-inject guest debug exceptions Date: Tue, 8 Dec 2015 18:32:32 +0000 Message-Id: <1449599553-24713-6-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1449599553-24713-1-git-send-email-alex.bennee@linaro.org> References: <1449599553-24713-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If we can't find details for the debug exception in our debug state then we can assume the exception is due to debugging inside the guest. To inject the exception into the guest state we re-use the TCG exception code (do_interrupt). However while guest debugging is in effect we currently can't handle the guest using single step as we will keep trapping to back to userspace. GDB makes heavy use of single-step behind the scenes which effectively means the guests ability to debug itself is disabled while it is being debugged. Signed-off-by: Alex Bennée --- v5: - new for v5 v10: - fix arm32 compile - add full stop at end of sentance - attempted to expand on limitations in commit msg --- target-arm/helper-a64.c | 12 ++++++++++-- target-arm/kvm64.c | 24 +++++++++++++++++------- 2 files changed, 27 insertions(+), 9 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index deb8dbe..fc3ccdf 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -25,6 +25,7 @@ #include "qemu/bitops.h" #include "internals.h" #include "qemu/crc32c.h" +#include "sysemu/kvm.h" #include /* For crc32 */ /* C2.4.7 Multiply and divide */ @@ -469,7 +470,8 @@ void aarch64_cpu_do_interrupt(CPUState *cs) new_el); if (qemu_loglevel_mask(CPU_LOG_INT) && !excp_is_internal(cs->exception_index)) { - qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%" PRIx32 "\n", + qemu_log_mask(CPU_LOG_INT, "...with ESR %x/0x%" PRIx32 "\n", + env->exception.syndrome >> ARM_EL_EC_SHIFT, env->exception.syndrome); } @@ -535,6 +537,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs) aarch64_restore_sp(env, new_el); env->pc = addr; - cs->interrupt_request |= CPU_INTERRUPT_EXITTB; + + qemu_log_mask(CPU_LOG_INT, "...to EL%d PC 0x%" PRIx64 " PSTATE 0x%x\n", + new_el, env->pc, pstate_read(env)); + + if (!kvm_enabled()) { + cs->interrupt_request |= CPU_INTERRUPT_EXITTB; + } } #endif diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c index 771ecdb..8e6d044 100644 --- a/target-arm/kvm64.c +++ b/target-arm/kvm64.c @@ -871,6 +871,7 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) { int hsr_ec = debug_exit->hsr >> ARM_EL_EC_SHIFT; ARMCPU *cpu = ARM_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); CPUARMState *env = &cpu->env; /* Ensure PC is synchronised */ @@ -881,7 +882,14 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) if (cs->singlestep_enabled) { return true; } else { - error_report("Came out of SINGLE STEP when not enabled"); + /* + * The kernel should have supressed the guests ability to + * single step at this point so something has gone wrong. + */ + error_report("%s: guest single-step while debugging unsupported" + " (%"PRIx64", %"PRIx32")\n", + __func__, env->pc, debug_exit->hsr); + return false; } break; case EC_AA64_BKPT: @@ -908,12 +916,14 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) __func__, debug_exit->hsr, env->pc); } - /* If we don't handle this it could be it really is for the - guest to handle */ - qemu_log_mask(LOG_UNIMP, - "%s: re-injecting exception not yet implemented" - " (0x%"PRIx32", %"PRIx64")\n", - __func__, hsr_ec, env->pc); + /* If we are not handling the debug exception it must belong to + * the guest. Let's re-use the existing TCG interrupt code to set + * everything up properly. + */ + cs->exception_index = EXCP_BKPT; + env->exception.syndrome = debug_exit->hsr; + env->exception.vaddress = debug_exit->far; + cc->do_interrupt(cs); return false; }