From patchwork Fri Feb 5 17:07:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Huang X-Patchwork-Id: 8237591 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F332A9F3CD for ; Fri, 5 Feb 2016 17:07:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1ECED20375 for ; Fri, 5 Feb 2016 17:07:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8F6AE2039E for ; Fri, 5 Feb 2016 17:07:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755611AbcBERHr (ORCPT ); Fri, 5 Feb 2016 12:07:47 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37169 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755470AbcBERHo (ORCPT ); Fri, 5 Feb 2016 12:07:44 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (Postfix) with ESMTPS id 446A8C0A803F; Fri, 5 Feb 2016 17:07:44 +0000 (UTC) Received: from apm-mustang-ev3-34.khw.lab.eng.bos.redhat.com (apm-mustang-ev3-34.khw.lab.eng.bos.redhat.com [10.16.184.128]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u15H7aS8017859; Fri, 5 Feb 2016 12:07:43 -0500 From: Wei Huang To: kvmarm@lists.cs.columbia.edu Cc: marc.zyngier@arm.com, christoffer.dall@linaro.org, kvm@vger.kernel.org, hanjun.guo@linaro.org, fu.wei@linaro.org, drjones@redhat.com, wei@redhat.com, al.stone@linaro.org Subject: [PATCH V1 6/7] KVM: GICv3: Extract the common code from DT Date: Fri, 5 Feb 2016 12:07:33 -0500 Message-Id: <1454692054-8984-7-git-send-email-wei@redhat.com> In-Reply-To: <1454692054-8984-1-git-send-email-wei@redhat.com> References: <1454692054-8984-1-git-send-email-wei@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In preparation for ACPI probing, this patch extracts the DT-neutral code into vgic_v3_probe(). DT function nows fills out the following info in *vgic: - maint_irq (mapped) - GICv resources Signed-off-by: Wei Huang --- virt/kvm/arm/vgic-v3.c | 75 ++++++++++++++++++++++++++++---------------------- 1 file changed, 42 insertions(+), 33 deletions(-) diff --git a/virt/kvm/arm/vgic-v3.c b/virt/kvm/arm/vgic-v3.c index b036134..5eca58a 100644 --- a/virt/kvm/arm/vgic-v3.c +++ b/virt/kvm/arm/vgic-v3.c @@ -239,20 +239,11 @@ static int vgic_v3_dt_probe(struct vgic_params *vgic) vgic->maint_irq = irq_of_parse_and_map(vgic_node, 0); if (!vgic->maint_irq) { - kvm_err("error getting vgic maintenance irq from DT\n"); + kvm_err("Cannot getting vgic maintenance irq from DT\n"); ret = -ENXIO; goto out; } - ich_vtr_el2 = kvm_call_hyp(__vgic_v3_get_ich_vtr_el2); - - /* - * The ListRegs field is 5 bits, but there is a architectural - * maximum of 16 list registers. Just ignore bit 4... - */ - vgic->nr_lr = (ich_vtr_el2 & 0xf) + 1; - vgic->can_emulate_gicv2 = false; - if (of_property_read_u32(vgic_node, "#redistributor-regions", &gicv_idx)) gicv_idx = 1; @@ -260,35 +251,15 @@ static int vgic_v3_dt_probe(struct vgic_params *vgic) if (of_address_to_resource(vgic_node, gicv_idx, &vcpu_res)) { kvm_info("GICv3: no GICV resource entry\n"); vgic->vcpu_phys_base = 0; - } else if (!PAGE_ALIGNED(vcpu_res.start)) { - pr_warn("GICV physical address 0x%llx not page aligned\n", - (unsigned long long)vcpu_res.start); - vgic->vcpu_phys_base = 0; - } else if (!PAGE_ALIGNED(resource_size(&vcpu_res))) { - pr_warn("GICV size 0x%llx not a multiple of page size 0x%lx\n", - (unsigned long long)resource_size(&vcpu_res), - PAGE_SIZE); - vgic->vcpu_phys_base = 0; } else { vgic->vcpu_phys_base = vcpu_res.start; - vgic->can_emulate_gicv2 = true; - kvm_register_device_ops(&kvm_arm_vgic_v2_ops, - KVM_DEV_TYPE_ARM_VGIC_V2); + vgic->vcpu_size = resource_size(&vcpu_res); } - if (vgic->vcpu_phys_base == 0) - kvm_info("disabling GICv2 emulation\n"); - kvm_register_device_ops(&kvm_arm_vgic_v3_ops, KVM_DEV_TYPE_ARM_VGIC_V3); - - vgic->vctrl_base = NULL; - vgic->type = VGIC_V3; - vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS; - - kvm_info("%s@%llx IRQ%d\n", vgic_node->name, - vcpu_res.start, vgic->maint_irq); out: of_node_put(vgic_node); return ret; } + /** * vgic_v3_probe - probe for a GICv3 compatible interrupt controller * @ops: address of a pointer to the GICv3 operations @@ -304,10 +275,48 @@ int vgic_v3_probe(const struct vgic_ops **ops, int ret = 0; struct vgic_params *vgic = &vgic_v3_params; + /* DT probing first, then try ACPI probing */ ret = vgic_v3_dt_probe(vgic); + if (ret) + goto out; + + ich_vtr_el2 = kvm_call_hyp(__vgic_v3_get_ich_vtr_el2); + + /* + * The ListRegs field is 5 bits, but there is a architectural + * maximum of 16 list registers. Just ignore bit 4... + */ + vgic->nr_lr = (ich_vtr_el2 & 0xf) + 1; + + if (!PAGE_ALIGNED(vgic->vcpu_phys_base)) { + pr_warn("GICV physical address 0x%llx not page aligned\n", + (unsigned long long)vgic->vcpu_phys_base); + vgic->vcpu_phys_base = 0; + } else if (!PAGE_ALIGNED(vgic->vcpu_size)) { + pr_warn("GICV size 0x%llx not a multiple of page size 0x%lx\n", + (unsigned long long)vgic->vcpu_size, PAGE_SIZE); + vgic->vcpu_phys_base = 0; + }; + + if (vgic->vcpu_phys_base != 0) { + vgic->can_emulate_gicv2 = true; + kvm_register_device_ops(&kvm_arm_vgic_v2_ops, + KVM_DEV_TYPE_ARM_VGIC_V2); + } else { + vgic->can_emulate_gicv2 = false; + kvm_info("disabling GICv2 emulation\n"); + } + + kvm_register_device_ops(&kvm_arm_vgic_v3_ops, KVM_DEV_TYPE_ARM_VGIC_V3); + + vgic->vctrl_base = NULL; + vgic->type = VGIC_V3; + vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS; + + kvm_info("GICv3@%llx IRQ%d\n", vgic->vcpu_phys_base, vgic->maint_irq); *ops = &vgic_v3_ops; *params = vgic; - +out: return ret; }