From patchwork Tue Mar 1 18:27:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 8468681 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C074A9F38C for ; Tue, 1 Mar 2016 18:32:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E39C420266 for ; Tue, 1 Mar 2016 18:32:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 77E2E20304 for ; Tue, 1 Mar 2016 18:32:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753332AbcCAScU (ORCPT ); Tue, 1 Mar 2016 13:32:20 -0500 Received: from mail-wm0-f48.google.com ([74.125.82.48]:37519 "EHLO mail-wm0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753103AbcCAS2t (ORCPT ); Tue, 1 Mar 2016 13:28:49 -0500 Received: by mail-wm0-f48.google.com with SMTP id p65so45947579wmp.0 for ; Tue, 01 Mar 2016 10:28:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WnGmw/X7Tn9wxWIaC0wUbZxTr3aQpO5YeDYhJaEUSR4=; b=L1f5EFWv7WVbMOQ0h/HuKT2WVeOvk7bHg0jKAQ4KhbuGCsy8BKWv4ZC8Jq5P7NbuHA a66xVGs0TMS3qu+wzvrDKPb0ntA48kxSy7r4m2ynRgAIlDjMNfMoISj8wDzlIk6nwMlF tTMr6klDNpcQ3asqwc9cpIDqjBdtR9tR96vC8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WnGmw/X7Tn9wxWIaC0wUbZxTr3aQpO5YeDYhJaEUSR4=; b=ESiSbozbUXWDCHh3zBA2sbVhQY8iifEgFemJeMh2b9g/hgujFLmOdQwO/DR03UuMmf l6dVvEGZ8DftHeGa7f5aC48Buh+aEqsQ5ITU1qjdIHlZt4AVPrlfvQw0zcPEVzJ4mG4x qIqt7jeqeiURFIfZgCFQ4r/rT4uUQINoTJPxRUjNKEkCQlnAUEmgegmyo6PaL8TqdTGS KfQ9H/2lGviFZ74n3+qmyOce5o7yd0ejEqA4UndDsGXYj8xXTgUQ27FLFYC7IvQvobmj PnULqmYSW1QBLZHxJPzwGJPAePMsjVQ5XxkvHq8xq8kS+9h8KYyLmLviRJnEpd2cKkOW rfzQ== X-Gm-Message-State: AD7BkJJj+G4YDnKeZFI6vqrZVX5FWG3MspAWd6Tlbj3vFUcpm7bQTBRWBTAm8b1mLgpMEz2+ X-Received: by 10.28.183.69 with SMTP id h66mr502861wmf.6.1456856927745; Tue, 01 Mar 2016 10:28:47 -0800 (PST) Received: from new-host-8.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id k8sm32176385wjr.38.2016.03.01.10.28.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Mar 2016 10:28:45 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: suravee.suthikulpanit@amd.com, patches@linaro.org, linux-kernel@vger.kernel.org, Manish.Jaggi@caviumnetworks.com, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org Subject: [RFC v5 11/17] msi: msi_compose wrapper Date: Tue, 1 Mar 2016 18:27:51 +0000 Message-Id: <1456856877-4817-12-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456856877-4817-1-git-send-email-eric.auger@linaro.org> References: <1456856877-4817-1-git-send-email-eric.auger@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the MSI message is composed by directly calling irq_chip_compose_msi_msg and erased by setting the memory to zero. On some platforms, we will need to complexify this composition to properly handle MSI emission through IOMMU. Also we will need to track when the MSI message is erased. We propose to introduce a common wrapper for actual composition and erasure, msi_compose. Signed-off-by: Eric Auger --- v4 -> v5: - just introduce the msi-compose wrapper without adding new functionalities v3 -> v4: - that code was formely in irq-gic-common.c "irqchip/gicv2m/v3-its-pci-msi: IOMMU map the MSI frame when needed" also the [un]mapping was done in irq_write_msi_msg; now done on compose v2 -> v3: - protect iova/addr manipulation with CONFIG_ARCH_DMA_ADDR_T_64BIT and CONFIG_PHYS_ADDR_T_64BIT - only expose gic_pci_msi_domain_write_msg in case CONFIG_IOMMU_API & CONFIG_PCI_MSI_IRQ_DOMAIN are set. - gic_set/unset_msi_addr duly become static --- kernel/irq/msi.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c index 9b0ba4a..72bf4d6 100644 --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -55,6 +55,19 @@ static inline void irq_chip_write_msi_msg(struct irq_data *data, data->chip->irq_write_msi_msg(data, msg); } +static int msi_compose(struct irq_data *irq_data, + struct msi_msg *msg, bool erase) +{ + int ret = 0; + + if (erase) + memset(msg, 0, sizeof(*msg)); + else + ret = irq_chip_compose_msi_msg(irq_data, msg); + + return ret; +} + /** * msi_domain_set_affinity - Generic affinity setter function for MSI domains * @irq_data: The irq data associated to the interrupt @@ -73,7 +86,7 @@ int msi_domain_set_affinity(struct irq_data *irq_data, ret = parent->chip->irq_set_affinity(parent, mask, force); if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) { - BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg)); + BUG_ON(msi_compose(irq_data, &msg, false)); irq_chip_write_msi_msg(irq_data, &msg); } @@ -85,7 +98,7 @@ static void msi_domain_activate(struct irq_domain *domain, { struct msi_msg msg; - BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg)); + BUG_ON(msi_compose(irq_data, &msg, false)); irq_chip_write_msi_msg(irq_data, &msg); } @@ -94,7 +107,7 @@ static void msi_domain_deactivate(struct irq_domain *domain, { struct msi_msg msg; - memset(&msg, 0, sizeof(msg)); + msi_compose(irq_data, &msg, true); irq_chip_write_msi_msg(irq_data, &msg); }