From patchwork Tue Mar 1 18:27:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 8468511 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 33827C0553 for ; Tue, 1 Mar 2016 18:29:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4E1C7202FF for ; Tue, 1 Mar 2016 18:29:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 70F6420266 for ; Tue, 1 Mar 2016 18:29:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753251AbcCAS3L (ORCPT ); Tue, 1 Mar 2016 13:29:11 -0500 Received: from mail-wm0-f45.google.com ([74.125.82.45]:36756 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753203AbcCAS3D (ORCPT ); Tue, 1 Mar 2016 13:29:03 -0500 Received: by mail-wm0-f45.google.com with SMTP id n186so50810805wmn.1 for ; Tue, 01 Mar 2016 10:29:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cujWFhUKexOiqR05DUZK+//zwamIkHJwZPLCxHcbnGY=; b=P4zx8Rku7KXVUMAI0I3wgTD6oJ+ROU6TgyxaJToyL9peAvdXuRizYaWLsPq3c3D2Nh SKNi8EGAcj0FwJoNUADdjScHwEhs0+noyA/azfFlYx6owKDcm9/zCQrPzClLMDhZmpHH +heeTrRbloFZIaSnYlqI/d32p2v/77w4JU5Yc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cujWFhUKexOiqR05DUZK+//zwamIkHJwZPLCxHcbnGY=; b=hEAMdVN4nHHWbomYVWvWDP07ukK6WDYMjS7Sug0U6CuLpa9GRnBqLl4zA6nciec1IM 1+FfZFJ1CkqJSNc29iIPhvKbtMdCbuYJ04srJ+Lcqu2yA9AwAdEkj7YFVRNmx5u/CRgb NQBLZEdHCtokzDD8GIfY5X9JD0nLQT/SRigi6O/VnaNoNfZ4PzzCHFBt8aet5DhgWoHu 5l/k0n2EJxStBWFUFpCtqYWkYAl9cyq97L+WZjwlYHNBrwzf0m2MHHRyaIjCoFf15VXz dPZ/joAEHPWaKYZQ9OoA9mM1//wplCMaz+v3/Hzh0c2NT5LFA058gmF+W9i+bfeozgqZ Qojw== X-Gm-Message-State: AD7BkJIgBFetP7QFCWCYtHiX3Z9DT8OCsnPB189IkpSPE9OHdNGBPcFaNPqIjcweJ32fwNIa X-Received: by 10.28.104.87 with SMTP id d84mr507287wmc.56.1456856942674; Tue, 01 Mar 2016 10:29:02 -0800 (PST) Received: from new-host-8.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id k8sm32176385wjr.38.2016.03.01.10.29.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Mar 2016 10:29:01 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: suravee.suthikulpanit@amd.com, patches@linaro.org, linux-kernel@vger.kernel.org, Manish.Jaggi@caviumnetworks.com, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org Subject: [RFC v5 16/17] iommu/arm-smmu: do not advertise IOMMU_CAP_INTR_REMAP Date: Tue, 1 Mar 2016 18:27:56 +0000 Message-Id: <1456856877-4817-17-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456856877-4817-1-git-send-email-eric.auger@linaro.org> References: <1456856877-4817-1-git-send-email-eric.auger@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu. Indeed the irq_remapping capability is abstracted on irqchip side for ARM as opposed to Intel IOMMU featuring IRQ remapping HW. So to check IRQ remapping capability, the msi domain needs to be checked instead. This commit needs to be applied after "vfio/type1: also check IRQ remapping capability at msi domain" else the legacy interrupt assignment gets broken with arm-smmu. Signed-off-by: Eric Auger --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index c8b7e71..ce988fb 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1284,7 +1284,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) */ return true; case IOMMU_CAP_INTR_REMAP: - return true; /* MSIs are just memory writes */ + return false; /* interrupt translation handled at MSI controller level */ case IOMMU_CAP_NOEXEC: return true; default: