From patchwork Mon Apr 4 08:06:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 8738281 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 827CC9F39A for ; Mon, 4 Apr 2016 08:10:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C24520251 for ; Mon, 4 Apr 2016 08:10:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B32452022A for ; Mon, 4 Apr 2016 08:10:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754683AbcDDIKL (ORCPT ); Mon, 4 Apr 2016 04:10:11 -0400 Received: from mail-lf0-f50.google.com ([209.85.215.50]:36202 "EHLO mail-lf0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753896AbcDDIHP (ORCPT ); Mon, 4 Apr 2016 04:07:15 -0400 Received: by mail-lf0-f50.google.com with SMTP id g184so82879615lfb.3 for ; Mon, 04 Apr 2016 01:07:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nDkUXBKT2hlhE15GEKvwNIlswsvMKRdWXqMO8yVEVeI=; b=ADtP+q4HmVwMC9baE9lqgakoS0vMF0dWilgew1IiY7v1fTcp2FgdyV7FqhBu6axjF0 5nkPJilG3FGakTpbpGgzXHeM81/JhE0IF7eikiRLcLJw5QtUKbx+r+laSeP3pthg6ysx /pI3Svd+4NKbfXQlRwa/kH/Lh+Ylkhlzg9XI8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nDkUXBKT2hlhE15GEKvwNIlswsvMKRdWXqMO8yVEVeI=; b=nFAJ4Co4nVzSHF9pKuyp8KOFuxooEBEgqx7Y5yoccMCcnoTPPIIDZv/JNAYQQ9PFVi s4KwjOByeqi1cuHkKTowRGuS/Y+YRNCw8rmcoxmPoUV0s/ZufMTQccHQHxV8LTp48seM 511voUHJiDnVAm9G5yV1/445bc/1unodMCqZ54dp6B06dua7FLJQKPixvmW9RkVVkdPo 96sSg28+1DQ03/Z9qmJKNsxfsh6zSR2/5B99mtURlaZgdriwuHsWSzQ8+k24yJqLG17/ fjv+aT4uaJkMTMLjRO87E/8emjCE65DAb8GJEN5LJ1t0OR2taM3qQpV7tE0e8fkhC4oV oWcg== X-Gm-Message-State: AD7BkJIlDsbhq+9NPsYrawr2tblggwUD3MPXyN4OyJtUeAl6YcFsvZkAHuHUwYsKDbj8kjT4 X-Received: by 10.194.22.97 with SMTP id c1mr10462508wjf.19.1459757233960; Mon, 04 Apr 2016 01:07:13 -0700 (PDT) Received: from new-host-2.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id m67sm7505239wma.3.2016.04.04.01.07.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Apr 2016 01:07:12 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: suravee.suthikulpanit@amd.com, patches@linaro.org, linux-kernel@vger.kernel.org, Manish.Jaggi@caviumnetworks.com, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org, Jean-Philippe.Brucker@arm.com, julien.grall@arm.com Subject: [PATCH v6 1/7] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute Date: Mon, 4 Apr 2016 08:06:56 +0000 Message-Id: <1459757222-2668-2-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459757222-2668-1-git-send-email-eric.auger@linaro.org> References: <1459757222-2668-1-git-send-email-eric.auger@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported, this means the MSI addresses need to be mapped in the IOMMU. x86 IOMMUs typically don't expose the attribute since on x86, MSI write transaction addresses always are within the 1MB PA region [FEE0_0000h - FEF0_000h] window which directly targets the APIC configuration space and hence bypass the sMMU. On ARM and PowerPC however MSI transactions are conveyed through the IOMMU. Signed-off-by: Bharat Bhushan Signed-off-by: Eric Auger --- v4 -> v5: - introduce the user in the next patch RFC v1 -> v1: - the data field is not used - for this attribute domain_get_attr simply returns 0 if the MSI_MAPPING capability if needed or <0 if not. - removed struct iommu_domain_msi_maps --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index a5c539f..a4fe04a 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -112,6 +112,7 @@ enum iommu_attr { DOMAIN_ATTR_FSL_PAMU_ENABLE, DOMAIN_ATTR_FSL_PAMUV1, DOMAIN_ATTR_NESTING, /* two stages of translation */ + DOMAIN_ATTR_MSI_MAPPING, /* Require MSIs mapping in iommu */ DOMAIN_ATTR_MAX, };