From patchwork Mon Sep 5 14:47:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Dakinevich X-Patchwork-Id: 9314191 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DB6E9600CA for ; Mon, 5 Sep 2016 14:48:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CCF6E28420 for ; Mon, 5 Sep 2016 14:48:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C137628ACC; Mon, 5 Sep 2016 14:48:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72EA128420 for ; Mon, 5 Sep 2016 14:48:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755500AbcIEOsH (ORCPT ); Mon, 5 Sep 2016 10:48:07 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:32929 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754920AbcIEOsG (ORCPT ); Mon, 5 Sep 2016 10:48:06 -0400 Received: by mail-lf0-f66.google.com with SMTP id l131so2885289lfl.0; Mon, 05 Sep 2016 07:48:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gu1McAZpTNTQ5XnCIuMhjBC2JSZsJz48LOZ9CAJh3aM=; b=uyer9z67B2StG0eTLeVekoMudG82TWDdj+w8kqa5GLVT78ssC6QToNL4ofEI1Hp3xu QgeMMKahVsJ/QYCpoqUUmhXUPAXDU92vDzMyr3YfssWL1P9FD7cMoSTcA3FOYHDkOORs 9YcXvQ8EsPEAGLLlFEatq2A6PU+cLAMw/Up82vPXTHuq/0KcSlCDtVB8W/r1LHA60JIZ h5HoFpa3A5LrgscjSJ/4VnUuobmWpipHqNhHtCvAfApbR2+w8TvjCLz5KJ3CStlKmS6P uC5YuqeTrKWzi+qmLUR8At1eku5PW2y9ryJ0CUdWHdPZuE8us8cJ1FpTvJ+viVtXu0TD Ab3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gu1McAZpTNTQ5XnCIuMhjBC2JSZsJz48LOZ9CAJh3aM=; b=P2hJmO4SEqZZw81WFZpwEK0GPlC1LLVy9aL0uHoPQME46THZq4kRhW23YzSmaVMygE EQt/Kk6vuLQo9It2B0Q5vI4GU4muPlDm/mP5eiFILVd1n67+e6Ju2upjmwUV8fSJwHJj 9pylDkuFCv1nQj++o5dW7mHMIDmCbW1JxfdOG7bdp5+7bmnTkYhF9zfq+9EEvZ0zm8tQ 7Nw6gveDpi6iLdf+3bSZyQGoYRByotZqnqo6G1IATh1sPNMgg3qeldsxEaPVKkJVan2J NcbolPBjeHvQG3d5CZXfJzlwbOeBOPtsbeS7MdLNdgWUl4va4VCWwC1Ed9iHdpfGLByJ vaLg== X-Gm-Message-State: AE9vXwPr3dQx5LMbzP8EPkt0+pfGyehaQ0r2nwpZLVtzSKFtrJpi+2PW4ZQrX2H4k7TH9A== X-Received: by 10.25.216.104 with SMTP id p101mr8790206lfg.192.1473086884550; Mon, 05 Sep 2016 07:48:04 -0700 (PDT) Received: from work.mail.msk ([185.6.245.156]) by smtp.gmail.com with ESMTPSA id u14sm4785468lja.11.2016.09.05.07.48.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Sep 2016 07:48:03 -0700 (PDT) From: Jan Dakinevich To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, ynorov@caviumnetworks.com, Jan Dakinevich Subject: [PATCH v2] KVM: nVMX: expose INS/OUTS information support Date: Mon, 5 Sep 2016 17:47:59 +0300 Message-Id: <1473086879-27087-1-git-send-email-jan.dakinevich@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <2bb16b3e-90c2-0d6d-cdf3-81addb170a7e@redhat.com> References: <2bb16b3e-90c2-0d6d-cdf3-81addb170a7e@redhat.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose the feature to L1 hypervisor if host CPU supports it, since certain hypervisors requires it for own purposes. According to Intel SDM A.1, if CPU supports the feature, VMX_INSTRUCTION_INFO field of VMCS will contain detailed information about INS/OUTS instructions handling. This field is already copied to VMCS12 for L1 hypervisor (see prepare_vmcs12 routine) independently of feature presence. Signed-off-by: Jan Dakinevich --- v1: * don't copy to basic_cap bits, which are already copied to size field * fix commit message arch/x86/kvm/vmx.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index a4bb2bd..10f9fb5 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -939,6 +939,7 @@ static DEFINE_SPINLOCK(vmx_vpid_lock); static struct vmcs_config { int size; int order; + u32 basic_cap; u32 revision_id; u32 pin_based_exec_ctrl; u32 cpu_based_exec_ctrl; @@ -1215,6 +1216,11 @@ static inline bool cpu_has_vmx_ple(void) SECONDARY_EXEC_PAUSE_LOOP_EXITING; } +static inline bool cpu_has_vmx_basic_inout(void) +{ + return (((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT); +} + static inline bool cpu_need_virtualize_apic_accesses(struct kvm_vcpu *vcpu) { return flexpriority_enabled && lapic_in_kernel(vcpu); @@ -2877,6 +2883,8 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) *pdata = VMCS12_REVISION | VMX_BASIC_TRUE_CTLS | ((u64)VMCS12_SIZE << VMX_BASIC_VMCS_SIZE_SHIFT) | (VMX_BASIC_MEM_TYPE_WB << VMX_BASIC_MEM_TYPE_SHIFT); + if (cpu_has_vmx_basic_inout()) + *pdata |= VMX_BASIC_INOUT; break; case MSR_IA32_VMX_TRUE_PINBASED_CTLS: case MSR_IA32_VMX_PINBASED_CTLS: @@ -3458,6 +3466,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) vmcs_conf->size = vmx_msr_high & 0x1fff; vmcs_conf->order = get_order(vmcs_config.size); + vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff; vmcs_conf->revision_id = vmx_msr_low; vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;