From patchwork Mon Sep 12 12:10:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 9326349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ABCFE6077F for ; Mon, 12 Sep 2016 12:10:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A7FF28C2E for ; Mon, 12 Sep 2016 12:10:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A78C28D5C; Mon, 12 Sep 2016 12:10:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 106CE28C2E for ; Mon, 12 Sep 2016 12:10:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758201AbcILMKr (ORCPT ); Mon, 12 Sep 2016 08:10:47 -0400 Received: from foss.arm.com ([217.140.101.70]:48274 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758050AbcILMKq (ORCPT ); Mon, 12 Sep 2016 08:10:46 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9A8CD2B; Mon, 12 Sep 2016 05:10:45 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6CFF93F220; Mon, 12 Sep 2016 05:10:45 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id C787F1AE2E00; Mon, 12 Sep 2016 13:10:45 +0100 (BST) From: Will Deacon To: virtualization@lists.linux-foundation.org, kvm@vger.kernel.org Cc: Will Deacon , Andy Lutomirski , "Michael S. Tsirkin" Subject: [PATCH] virtio_pci: Limit DMA mask to 44 bits for legacy virtio devices Date: Mon, 12 Sep 2016 13:10:41 +0100 Message-Id: <1473682241-21984-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Legacy virtio defines the virtqueue base using a 32-bit PFN field, with a read-only register indicating a fixed page size of 4k. This can cause problems for DMA allocators that allocate top down from the DMA mask, which is set to 64 bits. In this case, the addresses are silently truncated to 44-bit, leading to IOMMU faults, failure to read from the queue or data corruption. This patch restricts the DMA mask for legacy PCI virtio devices to 44 bits, which matches the specification. Cc: Andy Lutomirski Cc: Michael S. Tsirkin Signed-off-by: Will Deacon --- drivers/virtio/virtio_pci_legacy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c index 8c4e61783441..f4852febd40c 100644 --- a/drivers/virtio/virtio_pci_legacy.c +++ b/drivers/virtio/virtio_pci_legacy.c @@ -212,12 +212,12 @@ int virtio_pci_legacy_probe(struct virtio_pci_device *vp_dev) return -ENODEV; } - rc = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(64)); + rc = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(44)); if (rc) rc = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32)); if (rc) - dev_warn(&pci_dev->dev, "Failed to enable 64-bit or 32-bit DMA. Trying to continue, but this might not work.\n"); + dev_warn(&pci_dev->dev, "Failed to enable 44-bit or 32-bit DMA. Trying to continue, but this might not work.\n"); rc = pci_request_region(pci_dev, 0, "virtio-pci-legacy"); if (rc)