From patchwork Wed Nov 9 17:50:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Mattson X-Patchwork-Id: 9419907 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D88C360585 for ; Wed, 9 Nov 2016 17:50:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD9C028973 for ; Wed, 9 Nov 2016 17:50:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C23A3292ED; Wed, 9 Nov 2016 17:50:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29F5529360 for ; Wed, 9 Nov 2016 17:50:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754208AbcKIRue (ORCPT ); Wed, 9 Nov 2016 12:50:34 -0500 Received: from mail-pf0-f178.google.com ([209.85.192.178]:34394 "EHLO mail-pf0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752963AbcKIRuc (ORCPT ); Wed, 9 Nov 2016 12:50:32 -0500 Received: by mail-pf0-f178.google.com with SMTP id n85so130228421pfi.1 for ; Wed, 09 Nov 2016 09:50:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sDdpQPxDpeTH7UlS9aChCdHaoO3iyhDSundbrEJlfhA=; b=UMJMtcTlXdjVJjX3PS5tMS0e/EsgiT0gHDFJ6F2TYWXN9kJLOViXq0ucFelTXcr5vB GpOtx7fuyqM/x21FFs+K5zrQqdFaO+HCx7pGRB6NipNt3unwhyqccwUXWt6nyYrtuF/7 NmHRhh/zXsqC0kYF8iu2O7XtA71RV/0OT5jIENUOnCyYcuiwwdIxV7tnnNTd4uDsg77+ +HmWLUpKjg60UySQJnpi9MRk7A99DAFmxnLXSBmMWy9bFOqdAKftdjgaqkuDD3cp36Ye 0oE6VEKdEoxE2L97J4mFRSXmdF4dufYBLKIo11/Zi+Up05L2PJNVJqZmK43Ngl93glbD Bcsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sDdpQPxDpeTH7UlS9aChCdHaoO3iyhDSundbrEJlfhA=; b=IImMmJVqGyIhYWoEoR7uF72GobYg/4MDPHZqyokvaEPfG7dliHK/rrqoJYI/vG5Nk5 SKTaP/51JmQyP/ZUWfczVF1OLixq3zLPfaFTkt8O2LyVeb7+6URQMme2dgmF1PxXo1nI n7WVXtYzXl6Q2TfafekzXPRiY/lJJnnC1yzWGFh+KSvoNcY2f+P89nyQvUoZ5ALNZ3sf AxhhG/UQK03UGbLQHVWMAprm40XxvAbYKu/arYQrSD9oi0Eb4/UOP/pB/1mGNjAQ92Sa Q2NeEw0lSqg5J88K/oLtlTh2TI0fjCz80X7MpoMrgawsmXnrPi4WeN+M+ihDogmsJOuc UaHQ== X-Gm-Message-State: ABUngvdStmJzv19jmS4CXoEqhNJJ5RblZsz7rNuzCbmOSVWlKpV/ntPO84ZZqpwrwzUCru+l X-Received: by 10.98.67.89 with SMTP id q86mr1334227pfa.178.1478713830393; Wed, 09 Nov 2016 09:50:30 -0800 (PST) Received: from jmattson.sea.corp.google.com ([100.100.206.154]) by smtp.gmail.com with ESMTPSA id fh16sm826746pab.9.2016.11.09.09.50.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 09 Nov 2016 09:50:29 -0800 (PST) From: Jim Mattson To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , kvm@vger.kernel.org Cc: Jim Mattson Subject: [PATCH v3] kvm: nVMX: CPUID.01H:EDX.APIC[bit 9] should mirror IA32_APIC_BASE[11] Date: Wed, 9 Nov 2016 09:50:11 -0800 Message-Id: <1478713811-25147-1-git-send-email-jmattson@google.com> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: References: Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From the Intel SDM, volume 3, section 10.4.3, "Enabling or Disabling the Local APIC," When IA32_APIC_BASE[11] is 0, the processor is functionally equivalent to an IA-32 processor without an on-chip APIC. The CPUID feature flag for the APIC (see Section 10.4.2, "Presence of the Local APIC") is also set to 0. Signed-off-by: Jim Mattson --- arch/x86/kvm/cpuid.c | 4 ++++ arch/x86/kvm/lapic.c | 11 +++++++---- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index afa7bbb..84b62ee 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -81,6 +81,10 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu) best->ecx |= F(OSXSAVE); } + best->edx &= ~F(APIC); + if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE) + best->edx |= F(APIC); + if (apic) { if (best->ecx & F(TSC_DEADLINE_TIMER)) apic->lapic_timer.timer_mode_mask = 3 << 17; diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 23b99f3..7bd887b 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1748,14 +1748,17 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) u64 old_value = vcpu->arch.apic_base; struct kvm_lapic *apic = vcpu->arch.apic; - if (!apic) { + if (!apic) value |= MSR_IA32_APICBASE_BSP; - vcpu->arch.apic_base = value; - return; - } vcpu->arch.apic_base = value; + if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) + kvm_update_cpuid(vcpu); + + if (!apic) + return; + /* update jump label if enable bit changes */ if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) { if (value & MSR_IA32_APICBASE_ENABLE) {