From patchwork Tue Nov 29 04:25:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 9450925 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 128CD60710 for ; Tue, 29 Nov 2016 04:28:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D4F3280B0 for ; Tue, 29 Nov 2016 04:28:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 02211280DE; Tue, 29 Nov 2016 04:28:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48AE427F95 for ; Tue, 29 Nov 2016 04:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933043AbcK2E16 (ORCPT ); Mon, 28 Nov 2016 23:27:58 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48824 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933112AbcK2E1q (ORCPT ); Mon, 28 Nov 2016 23:27:46 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 72EAC80083; Tue, 29 Nov 2016 04:27:45 +0000 (UTC) Received: from pxdev.xzpeter.org (vpn1-7-237.pek2.redhat.com [10.72.7.237]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uAT4PrdU015727; Mon, 28 Nov 2016 23:27:41 -0500 From: Peter Xu To: kvm@vger.kernel.org Cc: drjones@redhat.com, agordeev@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com, pbonzini@redhat.com, peterx@redhat.com Subject: [PATCH v7 11/14] pci: edu: introduce pci-edu helpers Date: Tue, 29 Nov 2016 12:25:47 +0800 Message-Id: <1480393550-12385-12-git-send-email-peterx@redhat.com> In-Reply-To: <1480393550-12385-1-git-send-email-peterx@redhat.com> References: <1480393550-12385-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 29 Nov 2016 04:27:45 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP QEMU edu device is a pci device that is originally written for educational purpose, however it also suits for IOMMU unit test. Adding helpers for this specific device to implement the device logic. The device supports lots of functions, here only DMA operation is supported. The spec of the device can be found at: https://github.com/qemu/qemu/blob/master/docs/specs/edu.txt Reviewed-by: Andrew Jones Signed-off-by: Peter Xu --- lib/pci-edu.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++++++ lib/pci-edu.h | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 154 insertions(+) create mode 100644 lib/pci-edu.c create mode 100644 lib/pci-edu.h diff --git a/lib/pci-edu.c b/lib/pci-edu.c new file mode 100644 index 0000000..f56c2ac --- /dev/null +++ b/lib/pci-edu.c @@ -0,0 +1,72 @@ +/* + * Edu PCI device. + * + * Copyright (C) 2016 Red Hat, Inc. + * + * Authors: + * Peter Xu , + * + * This work is licensed under the terms of the GNU LGPL, version 2 or + * later. + */ + +#include "pci-edu.h" +#include "asm/barrier.h" + +/* Return true if alive */ +static inline bool edu_check_alive(struct pci_edu_dev *dev) +{ + static uint32_t live_count = 1; + uint32_t value; + + edu_reg_writel(dev, EDU_REG_ALIVE, live_count++); + value = edu_reg_readl(dev, EDU_REG_ALIVE); + return (live_count - 1 == ~value); +} + +bool edu_init(struct pci_edu_dev *dev) +{ + pcidevaddr_t dev_addr; + + dev_addr = pci_find_dev(PCI_VENDOR_ID_QEMU, PCI_DEVICE_ID_EDU); + if (dev_addr == PCIDEVADDR_INVALID) + return false; + + pci_dev_init(&dev->pci_dev, dev_addr); + pci_enable_defaults(&dev->pci_dev); + assert(edu_check_alive(dev)); + return true; +} + +void edu_dma(struct pci_edu_dev *dev, iova_t iova, + size_t size, unsigned int dev_offset, bool from_device) +{ + uint64_t from, to; + uint32_t cmd = EDU_CMD_DMA_START; + + assert(size <= EDU_DMA_SIZE_MAX); + assert(dev_offset < EDU_DMA_SIZE_MAX); + + printf("edu device DMA start %s addr %p size 0x%lu off 0x%x\n", + from_device ? "FROM" : "TO", + (void *)iova, size, dev_offset); + + if (from_device) { + from = dev_offset + EDU_DMA_START; + to = iova; + cmd |= EDU_CMD_DMA_FROM; + } else { + from = iova; + to = EDU_DMA_START + dev_offset; + cmd |= EDU_CMD_DMA_TO; + } + + edu_reg_writeq(dev, EDU_REG_DMA_SRC, from); + edu_reg_writeq(dev, EDU_REG_DMA_DST, to); + edu_reg_writeq(dev, EDU_REG_DMA_COUNT, size); + edu_reg_writel(dev, EDU_REG_DMA_CMD, cmd); + + /* Wait until DMA finished */ + while (edu_reg_readl(dev, EDU_REG_DMA_CMD) & EDU_CMD_DMA_START) + cpu_relax(); +} diff --git a/lib/pci-edu.h b/lib/pci-edu.h new file mode 100644 index 0000000..f931845 --- /dev/null +++ b/lib/pci-edu.h @@ -0,0 +1,82 @@ +/* + * Edu PCI device header. + * + * Copyright (C) 2016 Red Hat, Inc. + * + * Authors: + * Peter Xu , + * + * This work is licensed under the terms of the GNU LGPL, version 2 or + * later. + * + * Edu device is a virtualized device in QEMU. Please refer to + * docs/specs/edu.txt in QEMU repository for EDU device manual. + */ +#ifndef __PCI_EDU_H__ +#define __PCI_EDU_H__ + +#include "pci.h" +#include "asm/io.h" + +#define PCI_VENDOR_ID_QEMU 0x1234 +#define PCI_DEVICE_ID_EDU 0x11e8 + +/* The only bar used by EDU device */ +#define EDU_BAR 0 +#define EDU_MAGIC 0xed +#define EDU_VERSION 0x100 +#define EDU_DMA_BUF_SIZE (1 << 20) +#define EDU_INPUT_BUF_SIZE 256 + +#define EDU_REG_ID 0x0 +#define EDU_REG_ALIVE 0x4 +#define EDU_REG_FACTORIAL 0x8 +#define EDU_REG_STATUS 0x20 +#define EDU_REG_DMA_SRC 0x80 +#define EDU_REG_DMA_DST 0x88 +#define EDU_REG_DMA_COUNT 0x90 +#define EDU_REG_DMA_CMD 0x98 + +#define EDU_CMD_DMA_START 0x01 +#define EDU_CMD_DMA_FROM 0x02 +#define EDU_CMD_DMA_TO 0x00 + +#define EDU_STATUS_FACTORIAL 0x1 +#define EDU_STATUS_INT_ENABLE 0x80 + +#define EDU_DMA_START 0x40000 +#define EDU_DMA_SIZE_MAX 4096 + +struct pci_edu_dev { + struct pci_dev pci_dev; +}; + +#define edu_reg(d, r) (volatile void *)((d)->pci_dev.resource[EDU_BAR] + (r)) + +static inline uint64_t edu_reg_readq(struct pci_edu_dev *dev, int reg) +{ + return __raw_readq(edu_reg(dev, reg)); +} + +static inline uint32_t edu_reg_readl(struct pci_edu_dev *dev, int reg) +{ + return __raw_readl(edu_reg(dev, reg)); +} + +static inline void edu_reg_writeq(struct pci_edu_dev *dev, int reg, + uint64_t val) +{ + __raw_writeq(val, edu_reg(dev, reg)); +} + +static inline void edu_reg_writel(struct pci_edu_dev *dev, int reg, + uint32_t val) +{ + __raw_writel(val, edu_reg(dev, reg)); +} + +bool edu_init(struct pci_edu_dev *dev); +void edu_dma(struct pci_edu_dev *dev, iova_t iova, + size_t size, unsigned int dev_offset, bool from_device); + +#endif