From patchwork Mon Mar 6 11:34:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 9605853 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5129D602B4 for ; Mon, 6 Mar 2017 11:45:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C99728236 for ; Mon, 6 Mar 2017 11:45:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2147E28305; Mon, 6 Mar 2017 11:45:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE72B28236 for ; Mon, 6 Mar 2017 11:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753836AbdCFLpA (ORCPT ); Mon, 6 Mar 2017 06:45:00 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42638 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753171AbdCFLo4 (ORCPT ); Mon, 6 Mar 2017 06:44:56 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8CF7061D0B; Mon, 6 Mar 2017 11:34:46 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-116-100.ams2.redhat.com [10.36.116.100]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v26BYbnQ002618; Mon, 6 Mar 2017 06:34:42 -0500 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, marc.zyngier@arm.com, christoffer.dall@linaro.org, vijayak@caviumnetworks.com, Vijaya.Kumar@cavium.com, peter.maydell@linaro.org, linux-arm-kernel@lists.infradead.org, drjones@redhat.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: andre.przywara@arm.com, Prasun.Kapoor@cavium.com, pbonzini@redhat.com, dgilbert@redhat.com, quintela@redhat.com Subject: [PATCH v3 01/19] KVM: arm/arm64: Add vITS save/restore API documentation Date: Mon, 6 Mar 2017 12:34:16 +0100 Message-Id: <1488800074-21991-2-git-send-email-eric.auger@redhat.com> In-Reply-To: <1488800074-21991-1-git-send-email-eric.auger@redhat.com> References: <1488800074-21991-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 06 Mar 2017 11:34:47 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add description for how to access vITS registers and how to flush/restore vITS tables into/from memory Signed-off-by: Eric Auger --- v1 -> v2: - DTE and ITE now are 8 bytes - DTE and ITE now indexed by deviceid/eventid - use ITE name instead of ITTE - mentions ITT_addr matches bits [51:8] of the actual address - mentions LE layout --- Documentation/virtual/kvm/devices/arm-vgic-its.txt | 78 ++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/Documentation/virtual/kvm/devices/arm-vgic-its.txt b/Documentation/virtual/kvm/devices/arm-vgic-its.txt index 6081a5b..49ade0c 100644 --- a/Documentation/virtual/kvm/devices/arm-vgic-its.txt +++ b/Documentation/virtual/kvm/devices/arm-vgic-its.txt @@ -36,3 +36,81 @@ Groups: -ENXIO: ITS not properly configured as required prior to setting this attribute -ENOMEM: Memory shortage when allocating ITS internal data + + KVM_DEV_ARM_VGIC_GRP_ITS_REGS + Attributes: + The attr field of kvm_device_attr encodes the offset of the + ITS register, relative to the ITS control frame base address + (ITS_base). + + kvm_device_attr.addr points to a __u64 value whatever the width + of the addressed register (32/64 bits). + + Writes to read-only registers are ignored by the kernel except + for a single register, GITS_READR. Normally this register is RO + but it needs to be restored otherwise commands in the queue will + be re-executed after CWRITER setting. + + For other registers, Getting or setting a register has the same + effect as reading/writing the register on real hardware. + Errors: + -ENXIO: Offset does not correspond to any supported register + -EFAULT: Invalid user pointer for attr->addr + -EINVAL: Offset is not 64-bit aligned + + KVM_DEV_ARM_VGIC_GRP_ITS_TABLES + Attributes + The attr field of kvm_device_attr is not used. + + request the flush-save/restore of the ITS tables, namely + the device table, the collection table, all the ITT tables, + the LPI pending tables. On save, the tables are flushed + into guest memory at the location provisioned by the guest + in GITS_BASER (device and collection tables), on MAPD command + (ITT_addr), GICR_PENDBASERs (pending tables). + + This means the GIC should be restored before the ITS and all + ITS registers but the GITS_CTRL must be restored before + restoring the ITS tables. + + Note the LPI configuration table is read-only for the + in-kernel ITS and its save/restore goes through the standard + RAM save/restore. + + The layout of the tables in guest memory defines an ABI. + The entries are laid in little endian format as follows; + + The device table and ITE are respectively indexed by device id and + eventid. The collection table however is not indexed by collection id: + CTE are written at the beginning of the buffer. + + Device Table Entry (DTE) layout: entry size = 8 bytes + + bits: | 63 ... 45 | 44 ... 5 | 4 ... 0 | + values: | next | ITT_addr | Size | + + where + - ITT_addr matches bits [48:8] of the ITT address (256B aligned). + - next field is meaningful only if the entry is valid (ITT_addr != NULL). + It equals to 0 if this entry is the last one; otherwise it corresponds + to the minimum between the offset to the next device id and 2^19 -1. + + Collection Table Entry (CTE) layout: entry size = 8 bytes + + bits: | 63| 62 .. 52 | 51 ... 16 | 15 ... 0 | + values: | V | RES0 | RDBase | ICID | + + Interrupt Translation Entry (ITE) layout: entry size = 8 bytes + + bits: | 63 ... 48 | 47 ... 16 | 15 ... 0 | + values: | next | pINTID | ICID | + + - next field is meaningful only if the entry is valid (pINTID != NULL). + It equals to 0 if this entry is the last one; otherwise it corresponds + to the minimum between the eventid offset to the next ITE and 2^16 -1. + + LPI Pending Table layout: + + As specified in the ARM Generic Interrupt Controller Architecture + Specification GIC Architecture version 3.0 and version 4. The first + 1kB is not modified and therefore should contain zeroes.