From patchwork Mon Oct 16 12:13:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luwei Kang X-Patchwork-Id: 10010595 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AE727601D5 for ; Tue, 17 Oct 2017 01:57:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A074D2873B for ; Tue, 17 Oct 2017 01:57:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9574D2873D; Tue, 17 Oct 2017 01:57:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=2.0 tests=BAYES_00, DATE_IN_PAST_12_24, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 51F222873B for ; Tue, 17 Oct 2017 01:57:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932376AbdJQB5F (ORCPT ); Mon, 16 Oct 2017 21:57:05 -0400 Received: from mga05.intel.com ([192.55.52.43]:24653 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754715AbdJQB5D (ORCPT ); Mon, 16 Oct 2017 21:57:03 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP; 16 Oct 2017 18:57:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,389,1503385200"; d="scan'208";a="147207179" Received: from vmm.bj.intel.com ([10.238.135.172]) by orsmga002.jf.intel.com with ESMTP; 16 Oct 2017 18:56:58 -0700 From: Luwei Kang To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, Chao Peng , Luwei Kang Subject: [PATCH 7/9] KVM: x86: add Intel processor trace context for each vcpu Date: Mon, 16 Oct 2017 20:13:40 +0800 Message-Id: <1508156020-4934-1-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Peng Add a date structure to save Intel processor trace context. It mainly include all the MSR of Intel processor trace. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/vmx.h | 2 ++ arch/x86/kvm/vmx.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 57433e4..96124c8 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -135,6 +135,7 @@ #define MSR_IA32_RTIT_ADDR2_B 0x00000585 #define MSR_IA32_RTIT_ADDR3_A 0x00000586 #define MSR_IA32_RTIT_ADDR3_B 0x00000587 +#define MSR_IA32_RTIT_ADDR_COUNT 8 #define MSR_IA32_RTIT_CR3_MATCH 0x00000572 #define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 80e3e22..6293803 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -240,6 +240,8 @@ enum vmcs_field { GUEST_PDPTR3_HIGH = 0x00002811, GUEST_BNDCFGS = 0x00002812, GUEST_BNDCFGS_HIGH = 0x00002813, + GUEST_IA32_RTIT_CTL = 0x00002814, + GUEST_IA32_RTIT_CTL_HIGH = 0x00002815, HOST_IA32_PAT = 0x00002c00, HOST_IA32_PAT_HIGH = 0x00002c01, HOST_IA32_EFER = 0x00002c02, diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 9d1939e..5e86b5d 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -566,6 +566,21 @@ static inline int pi_test_sn(struct pi_desc *pi_desc) (unsigned long *)&pi_desc->control); } +struct pt_ctx { + u64 ctl; + u64 status; + u64 output_base; + u64 output_mask; + u64 cr3_match; + u64 addrs[MSR_IA32_RTIT_ADDR_COUNT]; +}; + +struct pt_desc { + unsigned int addr_num; + struct pt_ctx host; + struct pt_ctx guest; +}; + struct vcpu_vmx { struct kvm_vcpu vcpu; unsigned long host_rsp; @@ -655,6 +670,8 @@ struct vcpu_vmx { */ u64 msr_ia32_feature_control; u64 msr_ia32_feature_control_valid_bits; + + struct pt_desc pt_desc; }; enum segment_cache_field {