From patchwork Wed Mar 21 23:23:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liran Alon X-Patchwork-Id: 10300655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2FD7660349 for ; Wed, 21 Mar 2018 23:24:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2019F29155 for ; Wed, 21 Mar 2018 23:24:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1205D29919; Wed, 21 Mar 2018 23:24:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9046B29155 for ; Wed, 21 Mar 2018 23:24:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754269AbeCUXY0 (ORCPT ); Wed, 21 Mar 2018 19:24:26 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:60246 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754161AbeCUXYV (ORCPT ); Wed, 21 Mar 2018 19:24:21 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w2LNNxCU166292; Wed, 21 Mar 2018 23:24:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=jhFXyLck5k5XP768pxmfw2/jubCEY7T5F8V82H5qLRo=; b=pxJeY0RsiV8BMwG3fO8mkpnnKcqZBFkCB0bzeU2Lmyv3EcBDMUuJyquEmECNX3AYBe6E +NsxKGNqQ0LXEO0EMxHF+Xq2SpsSk3qNApgnfw3Nn/1VSInsqTFRYo+SjuEJ7fDWRwnl 7gaJRYhgNcdeeqASMSqDdIqH6UOSUPEaY1LBeyaNxl/F997abdr7VgdxbM3UM5VcCFWk krryxKN4IBPn1BOlM9vpn+HpvUUxwAHnccSeLZ3RxcT0nJFuqzt5Q3dzJX0mmSij3xc+ UE5jWJe4hq1zboA3BIvwYd0mejD+D/HpeCrQAqT3JVXX3w8qzQLGPZTAUgmgzFcle+hc gQ== Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp2120.oracle.com with ESMTP id 2gv11f004p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 21 Mar 2018 23:24:19 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w2LNOIqG005564 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 21 Mar 2018 23:24:18 GMT Received: from abhmp0019.oracle.com (abhmp0019.oracle.com [141.146.116.25]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w2LNOHfM021159; Wed, 21 Mar 2018 23:24:17 GMT Received: from liran-pc.Home (/109.66.44.151) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 21 Mar 2018 16:24:17 -0700 From: Liran Alon To: pbonzini@redhat.com, rkrcmar@redhat.com, kvm@vger.kernel.org Cc: idan.brown@oracle.com, Liran Alon , Krish Sadhukhan Subject: [PATCH 7/7] x86: nVMX: Verify pass-through IOAPIC & LAPIC to guest after ioapic scan Date: Thu, 22 Mar 2018 01:23:14 +0200 Message-Id: <1521674594-12085-8-git-send-email-liran.alon@oracle.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521674594-12085-1-git-send-email-liran.alon@oracle.com> References: <1521674594-12085-1-git-send-email-liran.alon@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8839 signatures=668695 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=988 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1803200127 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Verify that L1 pass-through of IOAPIC & LAPIC to L2 works even if another CPU triggers an ioapic scan while first CPU runs guest. This basically makes sure that vcpu->arch.ioapic_handled_vectors is updated correctly even for vCPUs that is currently running guest. For more details, refer to message of KVM commit ("KVM: nVMX: Do not load EOI-exitmap while running L2") Signed-off-by: Liran Alon Signed-off-by: Krish Sadhukhan --- x86/unittests.cfg | 7 ++++++ x86/vmx_tests.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 63 insertions(+), 9 deletions(-) diff --git a/x86/unittests.cfg b/x86/unittests.cfg index b6ad1b57e34e..1bca9ad83086 100644 --- a/x86/unittests.cfg +++ b/x86/unittests.cfg @@ -558,6 +558,13 @@ extra_params = -cpu host,+vmx -m 2048 -append vmx_apic_passthrough_test arch = x86_64 groups = vmx +[vmx_apic_passthrough_thread] +file = vmx.flat +smp = 2 +extra_params = -cpu host,+vmx -m 2048 -append vmx_apic_passthrough_thread_test +arch = x86_64 +groups = vmx + [debug] file = debug.flat arch = x86_64 diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index fe48981ead50..a7add274cf3f 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -4018,10 +4018,23 @@ static void vmx_eoi_bitmap_ioapic_scan_test(void) report(__func__, 1); } +static void set_irq_line_thread(void *data) +{ + /* Wait until other CPU entered L2 */ + while (vmx_get_test_stage() != 1) + ; + + /* Set irq-line 0xf to raise vector 0x78 for vCPU 0 */ + ioapic_set_redir(0xf, 0x78, TRIGGER_LEVEL); + vmx_set_test_stage(2); +} + +static bool irq_78_handler_vmcall_before_eoi; static void irq_78_handler_guest(isr_regs_t *regs) { set_irq_line(0xf, 0); - vmcall(); + if (irq_78_handler_vmcall_before_eoi) + vmcall(); eoi(); vmcall(); } @@ -4031,12 +4044,26 @@ static void vmx_apic_passthrough_guest(void) handle_irq(0x78, irq_78_handler_guest); irq_enable(); + /* If requested, wait for other CPU to trigger ioapic scan */ + if (vmx_get_test_stage() < 1) { + vmx_set_test_stage(1); + while (vmx_get_test_stage() != 2) + ; + } + set_irq_line(0xf, 1); } -static void vmx_apic_passthrough_test(void) +static void vmx_apic_passthrough(bool set_irq_line_from_thread) { - void *msr_bitmap = alloc_page(); + void *msr_bitmap; + + if (set_irq_line_from_thread && (cpu_count() < 2)) { + report_skip(__func__); + return; + } + + msr_bitmap = alloc_page(); u64 cpu_ctrl_0 = CPU_SECONDARY | CPU_MSR_BITMAP; u64 cpu_ctrl_1 = 0; @@ -4049,14 +4076,23 @@ static void vmx_apic_passthrough_test(void) vmcs_write(CPU_EXEC_CTRL0, vmcs_read(CPU_EXEC_CTRL0) | cpu_ctrl_0); vmcs_write(CPU_EXEC_CTRL1, vmcs_read(CPU_EXEC_CTRL1) | cpu_ctrl_1); - ioapic_set_redir(0xf, 0x78, TRIGGER_LEVEL); + if (set_irq_line_from_thread) { + irq_78_handler_vmcall_before_eoi = false; + on_cpu_async(1, set_irq_line_thread, NULL); + } else { + irq_78_handler_vmcall_before_eoi = true; + ioapic_set_redir(0xf, 0x78, TRIGGER_LEVEL); + vmx_set_test_stage(2); + } test_set_guest(vmx_apic_passthrough_guest); - /* Before EOI remote_irr should still be set */ - enter_guest(); - skip_exit_vmcall(); - TEST_ASSERT_EQ_MSG(1, (int)ioapic_read_redir(0xf).remote_irr, - "IOAPIC pass-through: remote_irr=1 before EOI"); + if (irq_78_handler_vmcall_before_eoi) { + /* Before EOI remote_irr should still be set */ + enter_guest(); + skip_exit_vmcall(); + TEST_ASSERT_EQ_MSG(1, (int)ioapic_read_redir(0xf).remote_irr, + "IOAPIC pass-through: remote_irr=1 before EOI"); + } /* After EOI remote_irr should be cleared */ enter_guest(); @@ -4069,6 +4105,16 @@ static void vmx_apic_passthrough_test(void) report(__func__, 1); } +static void vmx_apic_passthrough_test(void) +{ + vmx_apic_passthrough(false); +} + +static void vmx_apic_passthrough_thread_test(void) +{ + vmx_apic_passthrough(true); +} + #define TEST(name) { #name, .v2 = name } /* name/init/guest_main/exit_handler/syscall_handler/guest_regs */ @@ -4139,6 +4185,7 @@ struct vmx_test vmx_tests[] = { TEST(vmx_eoi_bitmap_ioapic_scan_test), /* APIC pass-through tests */ TEST(vmx_apic_passthrough_test), + TEST(vmx_apic_passthrough_thread_test), /* Regression tests */ TEST(vmx_cr_load_test), { NULL, NULL, NULL, NULL, NULL, {0} },