| Message ID | 1525406146-54791-1-git-send-email-jingqi.liu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 04/05/2018 05:55, Jingqi Liu wrote: > The CLDEMOTE instruction hints to hardware that the cache line that > contains the linear address should be moved("demoted") from > the cache(s) closest to the processor core to a level more distant > from the processor core. This may accelerate subsequent accesses > to the line by other cores in the same coherence domain, > especially if the line was written by the core that demotes the line. > > This patch exposes the cldemote feature to the guest. > > The release document ref below link: > https://software.intel.com/sites/default/files/managed/c5/15/\ > architecture-instruction-set-extensions-programming-reference.pdf > This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 > > Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> > Signed-off-by: Wei Wang <wei.w.wang@intel.com> Thanks. Note that the Signed-off-by chain for the patch looks strange, the submitter should be the last (because it is a chain). In the meanwhile, Ingo, Thomas, would it be possible to get a topic branch for that patch ("[PATCH] x86/cpufeatures: Enumerate cldemote instruction")? Thanks, Paolo > --- > arch/x86/kvm/cpuid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 82055b9..72d8c49 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > const u32 kvm_cpuid_7_0_ecx_x86_features = > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | > - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG); > + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | > + F(CLDEMOTE); > > /* cpuid 7.0.edx*/ > const u32 kvm_cpuid_7_0_edx_x86_features = >
Hi Paolo, Thanks. Will you help to modify the Signed-off-by chain ? Or do I need to submit the second version after modifying the Signed-off-by chain ? Thanks, Jingqi Liu -----Original Message----- From: Paolo Bonzini [mailto:pbonzini@redhat.com] Sent: Tuesday, May 8, 2018 12:30 AM To: Liu, Jingqi <jingqi.liu@intel.com>; kvm@vger.kernel.org Cc: rkrcmar@redhat.com; tglx@linutronix.de; mingo@redhat.com; hpa@zytor.com; x86@kernel.org; linux-kernel@vger.kernel.org; Wang, Wei W <wei.w.wang@intel.com> Subject: Re: [PATCH] KVM: x86: Expose CLDEMOTE CPU feature to guest VM On 04/05/2018 05:55, Jingqi Liu wrote: > The CLDEMOTE instruction hints to hardware that the cache line that > contains the linear address should be moved("demoted") from the > cache(s) closest to the processor core to a level more distant from > the processor core. This may accelerate subsequent accesses to the > line by other cores in the same coherence domain, especially if the > line was written by the core that demotes the line. > > This patch exposes the cldemote feature to the guest. > > The release document ref below link: > https://software.intel.com/sites/default/files/managed/c5/15/\ > architecture-instruction-set-extensions-programming-reference.pdf > This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 > > Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> > Signed-off-by: Wei Wang <wei.w.wang@intel.com> Thanks. Note that the Signed-off-by chain for the patch looks strange, the submitter should be the last (because it is a chain). In the meanwhile, Ingo, Thomas, would it be possible to get a topic branch for that patch ("[PATCH] x86/cpufeatures: Enumerate cldemote instruction")? Thanks, Paolo > --- > arch/x86/kvm/cpuid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index > 82055b9..72d8c49 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > const u32 kvm_cpuid_7_0_ecx_x86_features = > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | > - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG); > + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | > + F(CLDEMOTE); > > /* cpuid 7.0.edx*/ > const u32 kvm_cpuid_7_0_edx_x86_features = >
On 08/05/2018 04:03, Liu, Jingqi wrote: > Hi Paolo, > Thanks. > Will you help to modify the Signed-off-by chain ? > Or do I need to submit the second version after modifying the Signed-off-by chain ? Can you explain your role and Wei Wang's in the development of the patch? Thanks, Paolo
On Wednesday, May 9, 2018 7:52 PM, Paolo Bonzini wrote: > On 08/05/2018 04:03, Liu, Jingqi wrote: > > Hi Paolo, > > Thanks. > > Will you help to modify the Signed-off-by chain ? > > Or do I need to submit the second version after modifying the Signed-off- > by chain ? > > Can you explain your role and Wei Wang's in the development of the patch? > Hi Paolo, Thanks for reviewing our patches. Jingqi is the owner of the patches, I'm just an assistant. You could adjust the order or change mine to reviewed-by. Best, Wei
On 5/8/2018 12:30 AM, Paolo Bonzini wrote: > > On 04/05/2018 05:55, Jingqi Liu wrote: > > The CLDEMOTE instruction hints to hardware that the cache line that > > contains the linear address should be moved("demoted") from the > > cache(s) closest to the processor core to a level more distant from > > the processor core. This may accelerate subsequent accesses to the > > line by other cores in the same coherence domain, especially if the > > line was written by the core that demotes the line. > > > > This patch exposes the cldemote feature to the guest. > > > > The release document ref below link: > > https://software.intel.com/sites/default/files/managed/c5/15/\ > > architecture-instruction-set-extensions-programming-reference.pdf > > This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 > > > > Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> > > Signed-off-by: Wei Wang <wei.w.wang@intel.com> > > Thanks. Note that the Signed-off-by chain for the patch looks strange, the > submitter should be the last (because it is a chain). > > In the meanwhile, Ingo, Thomas, would it be possible to get a topic branch for > that patch ("[PATCH] x86/cpufeatures: Enumerate cldemote instruction")? > I had re-sent the patch: https://lkml.org/lkml/2018/5/21/91 Hi Ingo, Thomas, Would it be possible to get a topic branch for that patch ("[PATCH] x86/cpufeatures: Enumerate cldemote instruction")? Hi Paolo, Could you help to review this patch ? Thanks Jingqi > Thanks, > > Paolo > > > > --- > > arch/x86/kvm/cpuid.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index > > 82055b9..72d8c49 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct > kvm_cpuid_entry2 *entry, u32 function, > > const u32 kvm_cpuid_7_0_ecx_x86_features = > > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | > > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) > | > > - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | > F(AVX512_BITALG); > > + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | > F(AVX512_BITALG) | > > + F(CLDEMOTE); > > > > /* cpuid 7.0.edx*/ > > const u32 kvm_cpuid_7_0_edx_x86_features = > >
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 82055b9..72d8c49 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, const u32 kvm_cpuid_7_0_ecx_x86_features = F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG); + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | + F(CLDEMOTE); /* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features =
The CLDEMOTE instruction hints to hardware that the cache line that contains the linear address should be moved("demoted") from the cache(s) closest to the processor core to a level more distant from the processor core. This may accelerate subsequent accesses to the line by other cores in the same coherence domain, especially if the line was written by the core that demotes the line. This patch exposes the cldemote feature to the guest. The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> Signed-off-by: Wei Wang <wei.w.wang@intel.com> --- arch/x86/kvm/cpuid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)