| Message ID | 1526979687-1262-1-git-send-email-jingqi.liu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Paolo, I had changed the Signed-off-by chain. Could you help to review? Thanks. On 5/22/2018 5:01 PM, Liu, Jingqi wrote: > > The CLDEMOTE instruction hints to hardware that the cache line that contains > the linear address should be moved("demoted") from the cache(s) closest to the > processor core to a level more distant from the processor core. This may > accelerate subsequent accesses to the line by other cores in the same coherence > domain, especially if the line was written by the core that demotes the line. > > This patch exposes the cldemote feature to the guest. > > The release document ref below link: > https://software.intel.com/sites/default/files/managed/c5/15/\ > architecture-instruction-set-extensions-programming-reference.pdf > This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 > > Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> > --- > arch/x86/kvm/cpuid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index > 82055b9..72d8c49 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct > kvm_cpuid_entry2 *entry, u32 function, > const u32 kvm_cpuid_7_0_ecx_x86_features = > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) > | > - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | > F(AVX512_BITALG); > + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | > F(AVX512_BITALG) | > + F(CLDEMOTE); > > /* cpuid 7.0.edx*/ > const u32 kvm_cpuid_7_0_edx_x86_features = > -- > 1.8.3.1
On 04/06/2018 09:19, Liu, Jingqi wrote: > Hi Paolo, > > I had changed the Signed-off-by chain. > Could you help to review? > Thanks. The patch has been applied, thanks. Paolo > On 5/22/2018 5:01 PM, Liu, Jingqi wrote: > >> >> The CLDEMOTE instruction hints to hardware that the cache line that contains >> the linear address should be moved("demoted") from the cache(s) closest to the >> processor core to a level more distant from the processor core. This may >> accelerate subsequent accesses to the line by other cores in the same coherence >> domain, especially if the line was written by the core that demotes the line. >> >> This patch exposes the cldemote feature to the guest. >> >> The release document ref below link: >> https://software.intel.com/sites/default/files/managed/c5/15/\ >> architecture-instruction-set-extensions-programming-reference.pdf >> This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 >> >> Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> >> --- >> arch/x86/kvm/cpuid.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index >> 82055b9..72d8c49 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct >> kvm_cpuid_entry2 *entry, u32 function, >> const u32 kvm_cpuid_7_0_ecx_x86_features = >> F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | >> F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) >> | >> - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | >> F(AVX512_BITALG); >> + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | >> F(AVX512_BITALG) | >> + F(CLDEMOTE); >> >> /* cpuid 7.0.edx*/ >> const u32 kvm_cpuid_7_0_edx_x86_features = >> -- >> 1.8.3.1 >
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 82055b9..72d8c49 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -403,7 +403,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, const u32 kvm_cpuid_7_0_ecx_x86_features = F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | - F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG); + F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | + F(CLDEMOTE); /* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features =
The CLDEMOTE instruction hints to hardware that the cache line that contains the linear address should be moved("demoted") from the cache(s) closest to the processor core to a level more distant from the processor core. This may accelerate subsequent accesses to the line by other cores in the same coherence domain, especially if the line was written by the core that demotes the line. This patch exposes the cldemote feature to the guest. The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf This patch has a dependency on https://lkml.org/lkml/2018/4/23/928 Signed-off-by: Jingqi Liu <jingqi.liu@intel.com> --- arch/x86/kvm/cpuid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)